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SCF5249VM140 数据表(PDF) 28 Page - Freescale Semiconductor, Inc |
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SCF5249VM140 数据表(HTML) 28 Page - Freescale Semiconductor, Inc |
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28 / 56 page ![]() SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3 Electrical Characteristics Freescale Semiconductor 28 data from the JTAG logic. Shifting out of data depends on the state of the JTAG controller state machine and the instruction currently in the instruction register. This data shift occurs on the falling edge of TCK. When TDO is not outputting test data, it is three-stated. TDO can also be placed in three-state mode to allow bussed or parallel connections to other devices having JTAG. This signal also provides single-bit communication for the debug module responses. 8.21 Clock and Reset Signals These signals configure the SCF5249 and provide interface signals to the external system. 8.21.1 Reset In Asserting RSTI causes the SCF5249 to enter reset exception processing. When RSTI is recognized, the data bus is tri-stated. 8.21.2 System Bus Input The CRIN signal is the system clock input. The device has no on-chip clock oscillator, and needs an external oscillator. 9 Electrical Characteristics Table 15. Maximum Ratings Rating Symbol Value Units Supply Core Voltage Vcc -0.5 to +2.5 V Maximum Core Operating Voltage Vcc +1.98 V Minimum Core Operating Voltage Vcc +1.62 V Supply I/O Voltage Vcc -0.5 to +4.6 V Maximum I/O Operating Voltage Vcc +3.6 V Minimum I/O Operating Voltage Vcc +3.0 V Input Voltage Vin -0.5 to +6.0 V Storage Temperature Range Tstg -65 to150 oC Table 16. Operating Temperature Characteristic Symbol Value Units Maximum Operating Ambient Temperature TAmax 851 οC Minimum Operating Ambient Temperature TAmin 0 oC Note: This published maximum operating ambient temperature should be used only as a system design guideline. All device operating parameters are guaranteed only when the junction temperature does not exceed 105°C. |
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