SCF5249VM140 datasheet(33/56 Pages) FREESCALE

部件名	SCF5249VM140

功能描述	Integrated ColdFire Microprocessor

PDF	56 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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Electrical Characteristics

SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3

Freescale Semiconductor

Figure 5. Clock Timing Definition

NOTE

Signals above are shown in relation to the clock. No relationship between

signals is implied or intended.

9.1.1

Processor Bus Input Timing Specification

Table 20 lists processor bus input timings.

NOTE

All processor bus timings are synchronous; that is, input setup/hold and

output delay with respect to the rising edge of a reference clock. The

reference clock is the SCLK output. All other timing relationships can be

derived from these values.

Table 20. External Bus Input Timing Specifications

Num

Characteristica

Units

Symbol

Min

Max

SCLK

tCYC

14.26

—

Control input valid to SCLK highb

tCVCH

—

SCLK high to control inputs validb

tCHCII

—

Data input (D[31:0]) valid to SCLK high

tDIVCH

—

CRIN

PSTCLK

BCLK

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