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DSPIC33FJ12MC02ESS 数据表(PDF) 35 Page - Microchip Technology |
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DSPIC33FJ12MC02ESS 数据表(HTML) 35 Page - Microchip Technology |
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35 / 284 page  TABLE 3-10: 2-OUTPUT PWM2 REGISTER MAP SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State P2TCON 05C0 PTEN —PTSIDL — — — — — PTOPS<3:0> PTCKPS<1:0> PTMOD<1:0> 0000 0000 0000 0000 P2TMR 05C2 PTDIR PWM Timer Count Value Register 0000 0000 0000 0000 P2TPER 05C4 — PWM Time Base Period Register 0000 0000 0000 0000 P2SECMP 05C6 SEVTDIR PWM Special Event Compare Register 0000 0000 0000 0000 PWM2CON1 05C8 — — — — — — —PMOD1 — — — PEN1H — — — PEN1L 0000 0000 1111 1111 PWM2CON2 05CA — — — —SEVOPS<3:0> — — — — — IUE OSYNC UDIS 0000 0000 0000 0000 P2DTCON1 05CC DTBPS<1:0> DTB<5:0> DTAPS<1:0> DTA<5:0> 0000 0000 0000 0000 P2DTCON2 05CE — — — — — — — — — — — — — —DTS1A DTS1I 0000 0000 0000 0000 P2FLTACON 05D0 — — — — — — FAOV1H FAOV1L FLTAM — — — — — — FAEN1 0000 0000 0000 0000 P2OVDCON 05D4 — — — — — —POVD1H POVD1L — — — — — —POUT1H POUT1L 1111 1111 0000 0000 P2DC1 05D6 PWM Duty Cycle #1 Register 0000 0000 0000 0000 Legend: u = uninitialized bit, — = unimplemented, read as ‘0’ TABLE 3-11: QEI REGISTER MAP SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State QEICON 01E0 CNTERR — QEISIDL INDX UPDN QEIM<2:0> SWPAB PCDOUT TQGATE TQCKPS<1:0> POSRES TQCS UPDN_SRC 0000 0000 0000 0000 DFLTCON 01E2 — — — — — IMV<1:0> CEID QEOUT QECK<2:0> — — — — 0000 0000 0000 0000 POSCNT 01E4 Position Counter<15:0> 0000 0000 0000 0000 MAXCNT 01E6 Maximum Count<15:0> 1111 1111 1111 1111 Legend: u = uninitialized bit, — = unimplemented, read as ‘0’ TABLE 3-12: I2C1 REGISTER MAP SFR Name SFR Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 All Resets I2C1RCV 0200 — — — — — — — — Receive Register 0000 I2C1TRN 0202 — — — — — — — — Transmit Register 00FF I2C1BRG 0204 — — — — — — — Baud Rate Generator Register 0000 I2C1CON 0206 I2CEN — I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN PEN RSEN SEN 1000 I2C1STAT 0208 ACKSTAT TRSTAT — — — BCL GCSTAT ADD10 IWCOL I2COV D_A P S R_W RBF TBF 0000 I2C1ADD 020A — — — — — — Address Register 0000 I2C1MSK 020C — — — — — — Address Mask Register 0000 Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. |
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