DSPIC33FJ12MC02ESS datasheet(4/284 Pages) MICROCHIP

4 / 284 page

dsPIC33FJ12MC201/202

DS70265B-page 2

Preliminary

Motor Control Peripherals:

• 6-channel 16-bit Motor Control PWM

- 3 duty cycle generators

- Independent or Complementary mode

- Programmable dead time and output polarity

- Edge-aligned or center-aligned

- Manual output override control

- 1 Fault input

- Trigger for ADC conversions

- PWM frequency for 16-bit resolution

(@ 40 MIPS) = 1220 Hz for Edge-Aligned

mode, 610 Hz for Center-Aligned mode

- PWM frequency for 11-bit resolution

(@ 40 MIPS) = 39.1 kHz for Edge-Aligned

mode, 19.55 kHz for Center-Aligned mode

• 2-channel 16-bit Motor Control PWM

- 1 duty cycle generator

- Independent or Complementary mode

- Programmable dead time and output polarity

- Edge-aligned or center-aligned

- Manual output override control

- 1 Fault input

- Trigger for ADC conversions

- PWM frequency for 16-bit resolution

(@ 40 MIPS) = 1220 Hz for Edge-Aligned

mode, 610 Hz for Center-Aligned mode

- PWM frequency for 11-bit resolution

(@ 40 MIPS) = 39.1 kHz for Edge-Aligned

mode, 19.55 kHz for Center-Aligned mode

• Quadrature Encoder Interface module:

- Phase A, Phase B and index pulse input

- 16-bit up/down position counter

- Count direction status

- Position Measurement (x2 and x4) mode

- Programmable digital noise filters on inputs

- Alternate 16-bit Timer/Counter mode

- Interrupt on position counter rollover/underflow

Analog-to-Digital Converters (ADCs):

• 10-bit, 1.1 Msps or 12-bit, 500 Ksps conversion:

- 2 and 4 simultaneous samples (10-bit ADC)

- Up to 6 input channels with auto-scanning

- Conversion start can be manual or

synchronized with 1 of 4 trigger sources

- Conversion possible in Sleep mode

- ±2 LSb max integral nonlinearity

- ±1 LSb max differential nonlinearity

CMOS Flash Technology:

• Low-power, high-speed Flash technology

• Fully static design

• 3.3V (±10%) operating voltage

• Industrial and Extended temperature

• Low power consumption

Communication Modules:

• 4-wire SPI:

- Framing supports I/O interface to simple

codecs

- Supports 8-bit and 16-bit data

- Supports all serial clock formats and

sampling modes

•I2C™:

- Full Multi-Master Slave mode support

- 7-bit and 10-bit addressing

- Bus collision detection and arbitration

- Integrated signal conditioning

- Slave address masking

•UART:

- Interrupt on address bit detect

- Interrupt on UART error

- Wake-up on Start bit from Sleep mode

- 4-character TX and RX FIFO buffers

- LIN bus support

-IrDA® encoding and decoding in hardware

- High-Speed Baud mode

- Hardware Flow Control with CTS and RTS

Packaging:

• 20-pin SDIP/SSOP

• 28-pin SDIP/SOIC/QFN

Note:

See the device variant tables for exact

peripheral features per device.

DSPIC33FJ12MC02ESS 数据表(PDF) 4 Page - Microchip Technology

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