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DSPIC33FJ12MC02ESS 数据表(PDF) 134 Page - Microchip Technology |
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DSPIC33FJ12MC02ESS 数据表(HTML) 134 Page - Microchip Technology |
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134 / 284 page ![]() dsPIC33FJ12MC201/202 DS70265B-page 132 Preliminary © 2007 Microchip Technology Inc. FIGURE 11-1: TIMER2/3 (32-BIT) BLOCK DIAGRAM(1) Set T3IF Equal Comparator PR3 PR2 Reset LSb MSb Note 1: The 32-bit timer control bit, T32, must be set for 32-bit timer/counter operation. All control bits are respective to the T2CON register. 2: The ADC event trigger is available only on Timer2/3. Data Bus<15:0> TMR3HLD Read TMR2 Write TMR2 16 16 16 Q QD CK TGATE 0 1 TON TCKPS<1:0> 2 TCY TCS 1x 01 TGATE 00 T2CK ADC Event Trigger(2) Gate Sync Prescaler 1, 8, 64, 256 Sync TMR3 TMR2 16 |
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