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FALXT972MCCA4 数据表(PDF) 29 Page - Intel Corporation |
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FALXT972MCCA4 数据表(HTML) 29 Page - Intel Corporation |
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29 / 92 page ![]() Intel ® LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet 29 Document Number: 302875-005 Revision Date: 27-Oct-2005 5.4 Initialization This section includes the following topics: • Section 5.4.1, “MDIO Control Mode and Hardware Control Mode” • Section 5.4.2, “Reduced-Power Modes” • Section 5.4.3, “Reset for Intel® LXT972M Transceiver” • Section 5.4.4, “Hardware Configuration Settings” When the LXT972M Transceiver is first powered on, reset, or encounters a link failure state, it checks the MDIO register configuration bits to determine the line speed and operating conditions to use for the network link. |
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