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FALXT972MCCA4 数据表(PDF) 33 Page - Intel Corporation |
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FALXT972MCCA4 数据表(HTML) 33 Page - Intel Corporation |
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33 / 92 page  Intel ® LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet 33 Document Number: 302875-005 Revision Date: 27-Oct-2005 5.4.4 Hardware Configuration Settings The LXT972M Transceiver provides a hardware option to set the initial device configuration. As listed in Table 13, the hardware option uses the hardware configuration pins, the settings for which provide control bits. Table 13. Hardware Configuration Settings for Intel ® LXT972M Transceiver Desired Mode LED/CFG Pin Settings 1 Resulting Register Bit Values Control Register Auto-Negotiation Advertisement Register Auto- Neg. Speed (Mbps) Duplex 123 Auto- Neg. 0.12 Speed 0.13 Full- Duplex 0.8 100 BASE-TX Full- Duplex 4.8 100 BASE -TX 4.7 10 BASE-T Full- Duplex 4.6 10 BASE-T 4.5 Disabled 10 Half LLL 0 00 N/A Auto-Negotiation Advertisement Full L L H 0 1 100 Half L H L 1 0 Full L H H 1 1 Enabled 100 Only Half H L L 1 10 0 1 0 0 Full/Half H L H 1 1 1 1 0 0 10/100 Half Only H H L 1 0 0 1 0 1 Full or Half HH H 1 1 1 1 1 1 1. L = Low, and H = High. For LED/CFG pin assignments, see Chapter 3.0, “Pin Assignments for Intel® LXT972M Transceiver”. |
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