PIC16F913-ISLASHML datasheet(55/330 Pages) MICROCHIP

55 / 330 page

DS41250F-page 53

PIC16F913/914/916/917/946

3.3

PORTB and TRISB Registers

PORTB is an 8-bit bidirectional I/O port. All PORTB pins

can have a weak pull-up feature, and PORTB<7:4>

implements an interrupt-on-input change function.

PORTB is also used for the Serial Flash programming

interface and ICD interface.

EXAMPLE 3-2:

INITIALIZING PORTB

3.4

Additional PORTB Pin Functions

RB<7:6> are used as data and clock signals, respectively,

for both serial programming and the in-circuit debugger

features on the device. Also, RB0 can be configured as an

external interrupt input.

3.4.1

WEAK PULL-UPS

Each of the PORTB pins has an individually configurable

internal weak pull-up. Control bits WPUB<7:0> enable or

disable each pull-up. Refer to Register 3-7. Each weak

pull-up is automatically turned off when the port pin is

configured as an output. The pull-ups are disabled on a

Power-on Reset by the RBPU bit of the OPTION

3.4.2

INTERRUPT-ON-CHANGE

Four of the PORTB pins are individually configurable

as an interrupt-on-change pin. Control bits IOCB<7:4>

enable or disable the interrupt function for each pin.

Refer to Register 3-6. The interrupt-on-change feature

is disabled on a Power-on Reset.

For enabled interrupt-on-change pins, the values are

compared with the old value latched on the last read of

PORTB. The ‘mismatch’ outputs of the last read are

OR’d together to set the PORTB Change Interrupt flag

bit (RBIF) in the INTCON register (Register 2-3).

This interrupt can wake the device from Sleep. The user,

in the Interrupt Service Routine, clears the interrupt by:

a) Any read or write of PORTB. This will end the

mismatch condition.

b) Clear the flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF.

Reading or writing PORTB will end the mismatch con-

dition and allow flag bit RBIF to be cleared. The latch

holding the last read value is not affected by a MCLR

nor Brown-out Reset. After these Resets, the RBIF flag

will continue to be set if a mismatch is present.

BANKSEL PORTB

;

CLRF

PORTB

;Init PORTB

BANKSEL TRISB

;

MOVLW

0FFh

;Set RB<7:0> as inputs

MOVWF

TRISB

;

Note:

If a change on the I/O pin should occur

when the read operation is being executed

(start of the Q2 cycle), then the RBIF

interrupt flag may not get set. Furthermore,

since a read or write on a port affects all bits

of that port, care must be taken when using

multiple pins in Interrupt-on-change mode.

Changes on one pin may not be seen while

servicing changes on another pin.

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