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CS44800 数据表(PDF) 32 Page - Cirrus Logic

部件名 CS44800
功能描述  8-Channel Digital Amplifier Controller
PDF  80 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS44800 数据表(HTML) 32 Page - Cirrus Logic

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32
DS632F1
CS44800
4.5
FsOut Clock Domain Modules
4.5.1
Sample Rate Converter
One of the characteristics of a PWM amplifier is that the frequency content of out-of-band noise generated
by the modulator is dependent on the PWM switching frequency. The power stage external LC and snub-
ber filter component values are based on this switching frequency. To accommodate input sample rates
ranging from 32 kHz to 192 kHz the CS44800 utilizes a Sample Rate Converter (SRC) and several clock-
ing modes that keep the PWM switching frequency fixed.
The SRC supports a range of sample rate conversion to upsample rates from 32 kHz to 192 kHz to a fixed
FsOut sample rate. This is typically 384 kHz for most audio applications. The SRC also allows the PWM
modulator output to be independent of the input clock jitter since the output of the SRC is clocked from a
very stable crystal or oscillator. This results in very low jitter PWM output and higher dynamic range.
4.5.2
Load Compensation Filter
To accommodate varying speaker impedances, the CS44800 incorporates a 2-pole load compensation
filter to adjust the effective frequency response of the on-card L/C de-modulation filter. The frequency re-
sponse of the 2-pole inductor/capacitor filter used on the board to filter out the high-frequency PWM
switching clock is highly dependant on the resistive load (speaker) attached.
If the L/C filter implemented was designed for a low impedance load (4
Ω speaker), but an 8 Ω speaker
was attached, the frequency response would have a large peaking near the resonant frequency of the
L/C. The peaking usually starts at around 15 kHz, with about a +4 dB of gain at around 20 kHz. This phe-
nomenon will cause the system to not meet the frequency response requirements as specified by Dolby
Labs.
By using the programmable 2-pole load compensation filter, the overall frequency response of the system
can be modified to cut the amount of peaking. The 2 poles of the filter are independently configurable and
are concatenated to form the overall filter response. The first filter is defined as a coarse setting. This filter
should be programmed to provide most of the attenuation of the peaking. The second filter, defined as the
fine adjust, is used to achieve incremental improvements to the overall frequency response. Table 3
shows example register settings based on an output filter that has been designed for a 4
Ω load imped-
ance. See “Channel Compensation Filter - Coarse Adjust (CHXX_CORS[5:0])” on page 62 and “Channel
Compensation Filter - Fine Adjust (CHXX_FINE[5:0])” on page 63.
4.5.3
Digital Volume and Mute Control
The CS44800 provides two levels of volume control. A Master Volume Control Register is used to set the
volume level across all PWM channels. The register value, which selects a volume range of +24 dB to -
127 dB in 0.25 dB steps, is used to control the overall volume setting of all the amplifier channels. Volume
control changes are programmable to ramp in increments of 0.125 dB at a variable rate controlled by the
SZC[1:0] bits in “Volume Control Configuration (address 06h)” on page 55.
Each PWM channel’s output level is controlled via a Channel Volume Control register operating over the
range of +24 dB to -127 dB attenuation with 0.25 dB resolution. See “Channel XX Volume Control - Inte-
Load Impedance
Coarse Filter Setting
Fine Filter Setting
6
-1.2 dB
0 dB
8
-1.8 dB
0 dB
16
-3.4 dB
0 dB
Table 3. Load Compensation Example Settings



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