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ICS9LPR501 数据表(PDF) 6 Page - Integrated Circuit Systems |
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ICS9LPR501 数据表(HTML) 6 Page - Integrated Circuit Systems |
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6 / 22 page ![]() 6 Integrated Circuit Systems, Inc. ICS9LPR501 1118E—08/08/07 ICS9LPR501 follows Intel CK505 Yellow Cover specification. This clock synthesizer provides a single chip solution for next generation P4 Intel processors and Intel chipsets. ICS9LPR501 is driven with a 14.318MHz crystal. It also provides a tight ppm accuracy output for Serial ATA and PCI-Express support. General Description Block Diagram Power Groups REF CPU(1:0) CPU PLL1 SS OSC REF SRC(11-9,7:3) PLL2 Non-SS PLL3 SS 7 SRC8/ITP PCI SRC2/SATA SRC1/SE(2:1) SE Outputs SATA DOT96MHz PCI33MHz SRC SRC SR C _M A IN PCI33MHz Differential Output SRC0/DOT96 48MHz 48MHz CPU FSLA CKPWRGD/PD# PCI_STOP# CPU_STOP# CR#_(A:H) SRC5_EN ITP_EN FSLC/TESTSEL FSLB/TESTMODE Control Logic X1 X2 VDD GND 49 52 CPUCLK Low power outputs 55 52 26, 36, 45 23, 29, 42 Low power outputs 39 23, 29, 42 PLL 1 20 19 Low power outputs 16 19 PLL 3 12 11 DOT 96Mhz Low power outputs 911 61 58 28 Pin Number Description PLL3/SE Master Clock, Analog USB 48 Xtal, REF PCICLK SRCCLK |
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