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ICS1893CF 数据表(PDF) 38 Page - Integrated Circuit Systems |
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ICS1893CF 数据表(HTML) 38 Page - Integrated Circuit Systems |
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38 / 126 page ![]() ICS1893CF, Rev. F, 03/01/07 Mar. 2007 38 Chapter 6 Functional Blocks ICS1893CF Data Sheet - Release Copyright © 2007, Integrated Device Technology, Inc. All rights reserved. An ICS1893CF SQE Test Function is: • Enabled only when all the following conditions are true: – The ICS1893CF is in node mode. – The ICS1893CF is in half-duplex mode. – The ICS1893CF has a valid link. – The 10Base-T Operations Register’s SQE Test Inhibit bit (bit 18.2) is logic zero (the default). – The ICS1893CF TX_EN signal has transitioned from asserted (high) to de-asserted (low). • Disabled whenever any of the following are true: – The ICS1893CF is in full-duplex mode. – The ICS1893CF detects a link failure. – The ICS1893CF SQE Test Inhibit bit (bit 18.2) in the 10Base-T Operations Register is logic one. [This bit provides the Station Management entity (STA) with the ability to disable the SQE Test function.] Note: 1. In 10Base-T mode, a bit time has a typical duration of 100 ns. 2. The SQE Test also has the name 10Base-T Heartbeat. For details on the SQE waveforms, see Section 9.5.17, “10Base-T: Heartbeat Timing (SQE)”. 6.5.11 10Base-T Operation: Twisted-Pair Transmitter The 10Base-T Twisted-Pair Transmitter is functionally similar to the 100Base-TX Twisted-Pair Transmitter. The primary differences are in the data rate and signaling, as specified in the ISO/IEC specifications. For more information, see Section 6.4.5, “100Base-TX Operation: Twisted-Pair Transmitter”. 6.5.12 10Base-T Operation: Twisted-Pair Receiver The 10Base-T Twisted-Pair Receiver is functionally similar the 100Base-TX Twisted-Pair Receiver. The primary differences are in the data rate and signaling, as specified in the ISO/IEC specifications. For more information, see Section 6.4.6, “100Base-TX Operation: Twisted-Pair Receiver”. 6.5.13 10Base-T Operation: Auto Polarity Correction The ICS1893CF can sense and then automatically correct a signal polarity that is reversed on its Twisted-Pair Receiver inputs. A signal polarity reversal occurs when the input signals on an ICS1893CF’s TP_RXP and TP_RXN pins are crossed or swapped (a problem that can occur during network installation or wiring). The ICS1893CF accomplishes reversed signal polarity detection and correction by examining the signal polarity of the Normal Link Pulses (NLPs). In 10Base-T mode, an ICS1893CF transmits and receives NLPs when its link is in the Idle state. In 100Base-TX mode, an ICS1893CF transmits and receives NLPs during Auto-Negotiation. An STA can control this feature using the 10Base-T Operations Register bit 18.3, the Auto Polarity-Inhibit bit. When this bit is logic: • Zero, the ICS1893CF automatically senses and corrects a reversed or inverted signal polarity on its Twisted-Pair Receive pins (TP_RXP and TP_RXN). • One, the ICS1893CF disables this feature. |
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