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ICS1893CF 数据表(PDF) 82 Page - Integrated Circuit Systems |
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ICS1893CF 数据表(HTML) 82 Page - Integrated Circuit Systems |
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82 / 126 page ![]() ICS1893CF, Rev. F, 03/01/07 Mar. 2007 82 Chapter 7 Management Register Set ICS1893CF Data Sheet - Release Copyright © 2007, Integrated Device Technology, Inc. All rights reserved. Definitions: straight transmit = TP_AP & TP_AN receive = TP_BP & TP_BN cross transmit = TP_BP & TP_BN receive = TP_AP & TP_AN AMDIX_EN (Pin 10)AMDIX enable pin with 50 kOhm pull-up resistor AMDIX_EN [19:9] MDIO register 13h bit 9 MDI_MODE [19:8] MDIO register 13h bit 8 7.14.6 Twisted Pair Tri-State Enable, TPTRI (bit 19.7) The ICS1893CF provides a Twisted Pair Tri-State Enable bit. This bit forces the TP_TXP and TP_TXN signals to a high-impedance state. When this bit is set to logic: • Zero, the Twisted Pair Interface is operational. • One, the Twisted Pair Interface is tri-stated. 7.14.7 ICS Reserved (bits 19.6:1) See Section 7.11.2, “ICS Reserved (bits 16.14:11)”, the text for which also applies here. 7.14.8 Automatic 100Base-TX Power-Down (bit 19.0) The Automatic 100Base-TX Power Down bit provides an STA with the means of enabling the ICS1893CF to automatically shut down 100Base-TX support functions when 10Base-T operations are being used. When this bit is set to logic: • Zero, the 100Base-TX Transceiver does not power down automatically in 100Base-TX mode. • One, and the ICS1893CF is operating in 10Base-T mode, the 100Base-TX Transceiver automatically turns off to reduce the overall power consumption of the ICS1893CF. Note: There are other means of powering down the 100Base-TX Transceiver (for example, when the entire device is isolated using bit 0:10). 1 1 x straight / cross (auto selected) Default Values: 1 1 0 straight / cross (auto selected) Table 7-22. AMDIX_EN (Pin 10) and Control Bits 19. 9:8 AMDIX_EN (Pin 10) AMDIX_EN [Reg 19:9] MDI_MODE [Reg 19:8] Tx/Rx MDI Configuration |
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