Preliminary Technical Data

SSM2602

Rev. PrB | Page 7 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

PIN 1

INDICATOR

1

MCLK/XTI

2

XTO

3

DCVDD

4

DGND

5

DBVDD

6

INT/CLKOUT

7

BCLK

17 ROUT

18 AVDD

19 AGND

20 VMID

21 MICBIAS

16 LOUT

15 PGND

TOP VIEW

(Not to Scale)

SSM2602

Figure 2. Pin Configuration of SSM2602

Table 7. Pin Function Descriptions

Pin No.

Mnemonic

Type

Description

1

MCLK/XTI

Digital Input

Master Clock Input/Crystal Input

2

XTO

Digital Output

Crystal Output

3

DCVDD

Digital Supply

Digital Core Supply

4

DGND

Digital Ground

Digital Ground

5

DBVDD

Digital Supply

Digital I/O Supply

6

CLKOUT

Digital Output

Buffered Clock Output

7

BCLK

Digital Input/Output

Digital Audio Bit Clock. This pin is pulled down when the ACTIVE register is set to 0.

8

DACDAT

Digital Input

DAC Digital Audio Data Input

9

DACLRC

Digital Input/Output

DAC Sample Rate Clock (from Left and Right Channels). This pin is pulled down

when the ACTIVE register is set to 0.

10

ADCDAT

Digital Output

ADC Digital Audio Data Output

11

ADCLRC

Digital Input/Output

ADC Sample Rate Clock (from Left and Right Channels). This pin is pulled down

when the ACTIVE register is set to 0.

12

HPVDD

Analog Supply

Headphone Supply

13

LHPOUT

Analog Output

Left-Channel Headphone Output

14

RHPOUT

Analog Output

Right-Channel Headphone Output

15

PGND

Analog Ground

Headphone Ground

16

LOUT

Analog Output

Left-Channel Line Output

17

ROUT

Analog Output

Right-Channel Line Output

18

AVDD

Analog Supply

Analog Supply

19

AGND

Analog Ground

Analog Ground

20

VMID

Analog Output

Middle Voltage Decoupling Capacitor

21

MICBIAS

Analog Output

Microphone Bias

22

MICIN

Analog Input

Microphone Input Signal

23

RLINEIN

Analog Input

Right-Channel Line/Microphone Input

24

LLINEIN

Analog Input

Left-Channel Line/Microphone Input

25

MODE

Digital Input

26

CSB

Digital Input

3-Wire MPU Chip Select/2-Wire MPU Interface Address Selection, Active Low. This pin is

pulled up when the ACTIVE register is set to 0.

27

SDIN

Digital Input/Output

3-Wire MPU Data Input/2-Wire MPU Data Input/Output

28

SCLK

Digital Input

3-Wire MPU Clock Input/2-Wire MPU Clock Input