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SSM2602CPZ-R21 数据表(PDF) 20 Page - Analog Devices |
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SSM2602CPZ-R21 数据表(HTML) 20 Page - Analog Devices |
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20 / 28 page ![]() SSM2602 Preliminary Technical Data Rev. PrB | Page 20 of 28 LEFT-CHANNEL DAC VOLUME, ADDRESS 0x02 Table 15. Left-Channel DAC Volume Register Bit Map D8 D7 D6 D5 D4 D3 D2 D1 D0 LRHPBOTH LZCEN LHPVOL [6:0] Table 16. Descriptions of Left-Channel DAC Volume Register Bits Bit Name Description Settings LRHPBOTH Right-channel headphone volume update 0 = store LHPVOL in intermediate latch (default) 1 = update left- and right-channel gains LZCEN Left-channel zero cross detect enable 0 = disable (default) 1 = enable LHPVOL [6:0] Left-channel headphone volume control 000 0000 to 010 1111 = mute 011 0000 = −73 dB … 111 1001 = 0 dB (default) … 1 dB steps down to 111 1111 = +6 dB RIGHT-CHANNEL DAC VOLUME, ADDRESS 0x03 Table 17. Right-Channel DAC Volume Register Bit Map D8 D7 D6 D5 D4 D3 D2 D1 D0 RLHPBOTH RZCEN RHPVOL [6:0] Table 18. Descriptions of Right-Channel DAC Volume Register Bits Bit Name Description Settings RLHPBOTH Right-channel headphone volume update 0 = store RHPVOL in intermediate latch (default) 1 = update left- and right-channel gains RZCEN Right-channel zero cross detect enable 0 = disable (default) 1 = enable RHPVOL [6:0] Right-channel headphone volume control 000 0000 to 010 1111 = mute 011 0000 = −73 dB … 111 1001 = 0 dB (default) … 1 dB steps down to 111 1111 = +6 dB |
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