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ADL5961ACCZ-R7 数据表(PDF) 27 Page - Analog Devices

部件名 ADL5961ACCZ-R7
功能描述  9 kHz to 26.5 GHz Integrated Vector Network Analyzer Front End
PDF  34 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL5961ACCZ-R7 数据表(HTML) 27 Page - Analog Devices

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Data Sheet
ADL5961
APPLICATIONS INFORMATION
analog.com
Rev. 0 | 27 of 34
Figure 68. SPI Chip Select Interface
SDIO Interface
The ADL5961 implements a 3-wire SPI that uses a single line for
transmission and reception of data. When receiving data, that is,
during a write operation to the ADL5961, the transmitter output
becomes high-impedance such that the transmitting device can pull
the data line low or high as desired. To connect this interface to
an SPI controller using a 4-wire interface, with separate data input
and data output lines, a series current-limiting resistor, as is shown
in Figure 70, is recommended to isolate the controller and target
outputs. This resistor provides protection in the event that both
outputs become simultaneously active.
Figure 69. Simplified SDIO Interface
Figure 70. SPI 4-Wire to 3-Wire Interfacing
TEMP Interface
In addition to the on-chip digital thermometer, the TEMP pin can be
used to monitor the die temperature by applying a known reference
current into the TEMP pin and measure the pin voltage relative to
ground. An injected current of 42 µA results in a nominal voltage of
0.775 V at 25°C and a temperature slope of approximately −1.54
mV/°C.
Figure 71. Temperature Diode Interface
LO INTERFACE CONFIGURATION
The LO interface supports a bypass mode, three different multiply
modes, and one divide mode that are selectable through Register
0x20 in the SPI. Each of these operating modes is discussed in the
Bypass Mode (BYPASS = 1) section through the Multiply by 4 Mode
(LOMODE = 3) section.
Bypass Mode (BYPASS = 1)
The LO signal is routed directly to the internal downconversion
mixers, bypassing the frequency multipliers and dividers. The LO
multipliers and dividers and the offset frequency interface are disa-
bled. The ADL5961 achieves the widest bandwidth and the highest
dynamic range in this mode.
Divide by 2 Mode (LOMODE = 0)
The frequency of the LO input signal is divided by two before
being passed through the offset mixer and supplied to the down-
conversion mixers. If supported by the frequency range of the RF
signal, this LO operating mode provides a means to extend the
VNA measurements frequency range to less than the minimum
frequency supported by the LO source itself. This operating mode
can be used either with the offset frequency interface enabled or
disabled.
Multiply by 1 Mode (LOMODE = 1)
The LO signal bypasses the LO multipliers and dividers but is
routed through the offset mixer to the downconversion mixers.
The intended use is with the offset frequency interface enabled.
Although it can be used with the offset frequency interface disabled,
improved performance is achieved by selecting the bypass mode
(BYPASS = 1) instead.



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