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Output

A

Output

Input

C3

0.5 pF

B

D

0 V

0.9V

V

0 V

0 V

SS

SS

0 V

0.1V

SS

SS

C1

1 pF

C2

1 pF

R1

50

Ω

A

B

R1

24.9

Ω

0 V

∼ 0.6 V

0.1 V

0 V

∼ -0.6 V

0 V

-0.1 V

DE

Output With

Output

DE

Output With

D at 0 V

C1

1 pF

R2

24.9

Ω

C4

0.5 pF

C2

1 pF

D

C3

2.5 pF

SN65MLVD080

SN65MLVD082

SLLS581B – SEPTEMBER 2003 – REVISED SEPTEMBER 2005

PARAMETER MEASUREMENT INFORMATION (continued)

A.

duty cycle = 50

±5%.

B.

C1, C2, and C3 include instrumentation and fixture capacitance within 2 cm of the D.U.T. and are

±20%.

C.

R1 is a metal film, surface mount, and 1% tolerance and located within 2 cm of the D.U.T.

D.

The measurement is made on test equipment with a –3 dB bandwidth of at least 1 GHz.

Figure 5. Driver Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal

A.

duty cycle = 50

±5%.

B.

C1, C2, C3, and C4 includes instrumentation and fixture capacitance within 2 cm of the D.U.T. and are

±20%.

C.

R1 and R2 are metal film, surface mount, and 1% tolerance and located within 2 cm of the D.U.T.

D.

The measurement is made on test equipment with a –3 dB bandwidth of at least 1 GHz.

Figure 6. Driver Enable and Disable Time Circuit and Definitions

8

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