Data Sheet

ADL5511

APPLICATIONS INFORMATION

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Rev. E | 19 of 26

Figure 49. Basic Connections

BASIC CONNECTIONS

Basic connections for operation of the ADL5511 are shown in

Figure 49. The ADL5511 requires a single supply of 5 V. The supply

is connected to the VPOS supply pin. Decouple this pin using two

capacitors with values equal or similar to those shown in Figure 49.

Place these capacitors as close as possible to the VPOS pin.

An external 75 Ω resistor combines with the relatively high RF input

impedance of the ADL5511 to provide a broadband 50 Ω match.

Place an ac coupling capacitor between this resistor and RFIN.

The envelope output is available on Pin 10 (VENV) and is refer-

enced to the 1.1 V dc voltage on Pin 9 (EREF).

The rms output voltage is available at the VRMS pin with rms

averaging provided by the supply-referenced capacitance on Pin 14

(FLT4).

OPERATION BELOW 1 GHZ/ENVELOPE

FILTERING

To operate the ADL5511 at frequencies below 1 GHz, a number of

external capacitors must be added to the FLT3, FLT2, and FLT1

pins. These changes are in addition to the choice of an appropriate

rms averaging capacitor, see the Choosing a Value for the RMS

Averaging Capacitor (CFLT4) section.

As part of the internal signal processing algorithm, the RF input

signal passes through a low-pass filter comprising of a 10 kΩ

resistor and a 5 pF capacitor (see Figure 49). This corresponds to a

corner frequency of approximately 3.2 MHz. If the carrier frequency

is less than approximately ten times this value (32 MHz), this corner

frequency must be reduced.

The internal 5 pF capacitance can be augmented by connecting

a ground referenced capacitor to Pin 3 (FLT1). The value of the

external capacitance is set using the following equation:

CFLT1= 1

2π×f3dB×10,000 Ω

−5 pF

(3)

For example, a 100 pF capacitance on FLT1 will reduce the corner

frequency to 150 kHz. As a general guideline, this corner frequency

should be set to be at least one tenth of the minimum expected

carrier frequency. This ensures a flat frequency response around

the frequency of interest.

The envelope detection path of the ADL5511 includes internal

carrier-suppression low-pass filtering. With the FLT2 and FLT3 pins

not connected, two internal 1 GHz and 800 MHz low-pass filters

(operating in series) remove the RF carrier from the envelope

output signal.

The equations for these filters are as follows:

1

2π×0.4 pF×400 Ω

≅1 GHz

(4)

and

1

2π×0.8 pF×250 Ω

≅800 MHz

(5)

Because the envelope detection circuitry includes a full-wave rectifi-

er, this filter has to primarily suppress the signal at twice the original

input frequency.

For input frequencies in the 900 MHz range, there will still be

significant carrier content on the envelope output. With the two

filters providing a combined 6 dB roll-off at approximately 900

MHz and with the residual carrier at 1.8 GHz, carrier filtering of

approximately 18 dB can be expected (the two single-pole filters

provide a combined roll-off of 12 dB per octave.

The internal filtering of the carrier in the envelope detection path

can be augmented by adding additional supply-referenced capaci-

tance to the FLT2 and FLT3 pins. The required capacitance can be

calculated using the following equations:

CFLT2= 1

2π×fFLT2×400 Ω

−0.4 pF

(6)

and