Data Sheet

ADL5511

APPLICATIONS INFORMATION

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Rev. E | 23 of 26

Error (dB) = 20 × log [(VMEASURED − Intercept)/(Slope ×

VIN_IDEAL)]

(13)

Figure 55 is a plot of this error for VENV at 1900 MHz for a multiple

devices at +25°C, +85°C, and −40°C with calibration performed at

two points, −14 dBm and +5 dBm (notice how the error at 25°C at

the calibration points is zero). These error plots for all temperatures

are calculated using the 25°C slope and intercept. This is consistent

with calibration in a mass production environment where calibration

at temperature is generally not practical.

Figure 55. VENV Linearity Error vs. Input Level and Temperature Using a

Two

‑Point Calibration at 1900 MHz

By adding a third calibration point, the linearity of the ADL5511 can

be enhanced at lower power levels. With a three‑point calibration,

calibration coefficients (slope and intercept) are calculated for each

segment (thus, there will be two slopes and two intercepts).

Figure 56 shows the same data as Figure 55, but with a three-point

calibration (calibration points at −26 dBm, −15 dBm, and +5 dBm.

This helps to extend the usable operating range of the ADL5511

well below −25 dBm.

Figure 56. VENV Linearity Error vs. Input Level and Temperature Using a

Three-Point Calibration at 1900 MHz

ERROR VS. FREQUENCY

Figure 57 and Figure 58 show how the VRMS and VENV output

voltages and error vary with input frequency when the ADL5511 is

calibrated at a single frequency. In this example, the ADL5511 has

been calibrated at 25°C at 1.9 GHz. The plots also show how the

output voltage and error vary above and below this frequency.

Figure 57. VRMS Output vs. Frequency for a Fixed Input Power, PIN = 0 dBm,

Calibration at 1.9 GHz, 25°C

Figure 58. VENV Output vs. Frequency for a Fixed Input Power, PIN = 0 dBm,

Calibration at 1.9 GHz, 25°C

EVALUATION BOARD

Figure 59 shows the schematic of the ADL5511 evaluation board.

This 4-layer board is powered by a single supply in the 4.75 V to

5.25 V range. The power supply is decoupled by 100 pF and 0.1 µF

capacitors.

Table 5 details the various configuration options of the evaluation

board. Figure 60 and Figure 61 show the bottom side and top side

layouts, respectively.

The RF input has a broadband match of 50 Ω using a single 75 Ω

resistor at R5.