PPC440SP-RNC667C datasheet(13/85 Pages) AMCC

13 / 85 page

PowerPC 440SP Embedded Processor

Revision 1.23 - Sept 26, 2006

AMCC Proprietary

Data Sheet

of the Memory Controller unit.

The RAID 5 and RAID 6 parity computations performed in the Memory Queue are assisted by the two-channel

DMA engine of the I2O/DMA controller unit, designated as DMA0 and DMA1. The RAID acceleration hardware

also provides various alternatives for balancing load and performance, depending on customer-specific application

firmware. The two-way crossbar bus architecture can perform data read and write operations simultaneously,

resulting in extremely high throughput.

RAID 6 capability is available only with the RAID-enabled part numbers (PPC440SP-RpCfffC) as indicated in the

ordering information section of this data sheet.

For more information about the RAID 6 implementation, description, and configuration of the acceleration

hardware, refer to the following AMCC documents:

• PowerPC 440SP/440SPe RAID Support Application Note

• PowerPC 440SP RAID Addendum to the User’s Manual

XOR/DMA2 Controller

The XOR/DMA2 controller performs the XOR functions needed to support RAID 5 applications including parity

generation and check functions used across data stripes in a RAID 5 system.

Features include:

• Computes a bit-wise XOR on up to 16 data streams with result stored in designated target

• Performs XOR check on up to 16 data streams

• Driven by a linked list Command Block structure specifying control information, source operands, target

operand, status information, and link

• Source and target streams may reside anywhere in PLB address space.

• Provides completion status per Command Block to be handled by software at a later time

• 96-byte and 160-byte Command Block formats are supported

• No memory alignment restrictions on operands or target

• Internal register arrays and data buffers are parity protected

• Can be used as a DMA controller (DMA2) with single source and target addresses

Serial Port

The serial port is compatible with the NS‚ 16570 UART interface.

Features include:

• One 8-pin, one 4-pin, and one 2-pin interfaces are provided

• Selectable internal or external serial clock to allow wide range of baud rates

• Register compatibility with 16750 register set

• Complete status reporting capability

• Fully programmable serial-interface characteristics

IIC Bus Interface

PPC440SP-RNC667C 数据表(PDF) 13 Page - Applied Micro Circuits Corporation

PPC440SP-RNC667C 数据表(HTML) 13 Page - Applied Micro Circuits Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85

数据表下载