PM6680 datasheet(39/49 Pages) STMICROELECTRONICS

39 / 49 page

PM6680

Device description

39/49

The T node voltage is the sum of the output voltage and the triangular waveform generated

by the virtual ESR network. In fact the virtual ESR network behaves like a further equivalent

ESR RESR.

A good trade-off is to design the network in order to achieve an RESR given by:

Equation 28

where

∆I

L is the inductor current ripple and VRIPPLE is the overall ripple of the T node

voltage. It should be chosen higher than approximately 30mV.

The new closed loop gain depends on CINT. In order to ensure stability it must be verified

that:

Equation 29

Where:

Equation 30

where RTOT is the sum of the ESR of the output capacitor Rout and the equivalent ESR

given by the virtual ESR network RESR.

Moreover CINT must meet the following condition:

Equation 31

Where k is a free design parameter greater than 3 and determines the minimum integrator

capacitor value CINT:

Equation 32

C must be selected as shown:

Equation 33

out

RIPPLE

ESR

−

∆

OUT

INT

TOT

out

TOT

out

OUT

INT

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

INT

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