ST10F273E datasheet(132/179 Pages) STMICROELECTRONICS

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Electrical characteristics

ST10F273E

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Figure 35.

Port2 test mode structure

Figure 36.

Supply current versus the operating frequency (RUN and IDLE modes)

10. The Idle mode supply current is a function of the operating frequency (fCPU is expressed in MHz). This dependency is

illustrated in the Figure 35 below. These parameters are tested and at maximum CPU clock with all outputs disconnected

and all inputs at VIL or VIH, RSTIN pin at VIH1Min.

11. This parameter is tested including leakage currents. All inputs (including pins configured as inputs) at 0 V to 0.1 V or at VDD

– 0.1 V to VDD, VAREF = 0 V, all outputs (including pins configured as outputs) disconnected. Besides, the Main Voltage

Regulator is assumed off: in case it is not, additional 1mA shall be assumed. The value for this parameter shall be

considered as “Target Value” to be confirmed by silicon characterization.

12. Overload conditions occur if the standard operating conditions are exceeded, i.e. the voltage on any pin exceeds the

specified range (i.e. VOV > VDD + 0.3 V or VOV < –0.3 V). The absolute sum of input overload currents on all port pins may

not exceed 50mA. The supply voltage must remain within the specified limits.

13. This parameter is tested including leakage currents. All inputs (including pins configured as inputs) at 0 V to 0.1 V or at VDD

– 0.1 V to VDD, VAREF = 0 V, all outputs (including pins configured as outputs) disconnected. Besides, the Main Voltage

Regulator is assumed off: in case it is not, additional 1mA shall be assumed. The value for this parameter shall be

considered as “Target Value” to be confirmed by silicon characterization.

Input

latch

Clock

P2.0

CC0IO

Output

buffer

Test mode

Alternate data input

Fast external interrupt input

Flash sense amplifier

and column decoder

fCPU [MHz]

ICC1

ICC2

IID

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