ST10F273E datasheet(133/179 Pages) STMICROELECTRONICS

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ST10F273E

Electrical characteristics

133/179

24.6

Flash characteristics

VDD = 5 V

± 10%, V

SS = 0 V

Table 65.

Flash characteristics

Parameter

Typical

Maximum

Unit

Notes

TA = 25°C

TA = 125°C

0 cycles(1)

The figures are given after about 100 cycles due to testing routines (0 cycles at the final customer).

0 cycles(1)

100k

cycles

Word program (32-bit)(2)

Word and Double Word Programming times are provided as average values derived from a full sector

programming time: absolute value of a Word or Double Word Programming time could be longer than the

average value.

290

µs–

Double word program

(64-bit)(2)

150

570

µs–

Bank 0 program (384K)

(double word program)

2.9

7.4

28.0

–

Bank 1 program (128K)

(double word program)

1.0

2.5

9.3

–

Sector erase (8K)

0.6

0.5

0.9

0.8

1.0

0.9

not preprogrammed

preprogrammed

Sector erase (32K)

1.1

0.8

2.0

1.8

2.7

2.5

not preprogrammed

preprogrammed

Sector erase (64K)

1.7

1.3

3.7

3.3

5.1

4.7

not preprogrammed

preprogrammed

Bank 0 erase (384K)(3)

Bank Erase is obtained through a multiple Sector Erase operation (setting bits related to all sectors of the

Bank). As ST10F273E implements only one bank, the Bank Erase operation is equivalent to Module and

Chip Erase operations.

8.2

5.8

20.2

17.7

28.6

26.1

not preprogrammed

preprogrammed

Bank 1 erase (128K)(3)

3.0

2.2

7.0

6.2

9.8

9.0

not preprogrammed

preprogrammed

Recovery from power-down

(tPD)

-40

µs

(4)

Not 100% tested, guaranteed by Design Characterization

Program suspend latency(4)

-10

µs

Erase suspend latency(4)

-30

µs

Erase suspend request rate(4)

Minimum delay

between 2 requests

Set protection(4)

170

µs

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