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M58BW016DB 数据表(PDF) 49 Page - STMicroelectronics |
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M58BW016DB 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 69 page  M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB DC and AC parameters 49/69 Figure 15. Synchronous Burst Read - continuous - valid data ready output 1. Valid Data Ready = Valid Low during valid clock edge 2. V= Valid output. 3. R is an open drain output with an internal pull up resistor of 1 M Ω. The internal timing of R follows DQ. An external resistor, typically 300 k Ω. for a single memory on the R bus, should be used to give the data valid set up time required to recognize that valid data is available on the next valid clock edge. Figure 16. Synchronous Burst Read - Burst Address Advance AI03649 K Output (1) VV V V tRLKH R V (2) AI03650 K ADD Q0 Q1 L Q2 ADD VALID G tGLQV tBLKH tBHKH B |
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