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TUSB1044AI 数据表(PDF) 24 Page - Texas Instruments |
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TUSB1044AI 数据表(HTML) 24 Page - Texas Instruments |
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24 / 66 page  Table 7-3. GPIO Configuration Control (continued) DIR1 PIN DIR0 PIN CTL1 PIN CTL0 PIN FLIP PIN TUSB1044A CONFIGURATION VESA® DisplayPort™ ALT MODE DFP_D CONFIGURATION L H L L L Power Down – L H L L H Power Down – L H L H L One Port USB 3.2 - No Flip – L H L H H One Port USB 3.2 – With Flip – L H H L L 4-Lane DP - No Flip C and E L H H L H 4-Lane DP – With Flip C and E L H H H L One Port USB 3.2 + 2-Lane DP- No Flip D and F L H H H H One Port USB 3.2 + 2-Lane DP– With Flip D and F USB + Custom Alternate Mode (Source Side) H L L L L Power Down – H L L L H Power Down – H L L H L One Port USB 3.2 - No Flip – H L L H H One Port USB 3.2 – With Flip – H L H L L 4-Channel Custom Alt Mode - No Flip – H L H L H 4-Channel Custom Alt Mode– With Flip – H L H H L USB 3.2 x2 - No Flip – H L H H H USB 3.2 x2 – With Flip – USB + Custom Alternate Mode (Sink Side) H H L L L Power Down - H H L L H Power Down - H H L H L One Port USB 3.2 - No Flip - H H L H H One Port USB 3.2 – With Flip - H H H L L 4-Channel Custom Alt Mode - No Flip - H H H L H 4-Channel Custom Alt Mode– With Flip - H H H H L USB 3.2 x2 - No Flip - H H H H H USB 3.2 x2 – With Flip - Table 7-4. GPIO AUXP/N to SBU1/2 Mapping CTL1 PIN FLIP PIN MAPPING H L AUXP -> SBU1 AUXN -> SBU2 H H AUXP -> SBU2 AUXN -> SBU1 L > 2ms X Open TUSB1044A SLLSG07 – MARCH 2025 www.ti.com 24 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TUSB1044A |
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