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ADIN1111BCPZ-R7 数据表(PDF) 19 Page - Analog Devices

部件名 ADIN1111BCPZ-R7
功能描述  Robust, Industrial, Low Power 10BASE-T1L Ethernet MAC-PHY
PDF  109 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADIN1111BCPZ-R7 数据表(HTML) 19 Page - Analog Devices

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Data Sheet
ADIN1111
BRINGING UP 10BASE-T1L LINKS
analog.com
Rev. A | 19 of 109
The ADIN1111 can also be configured to advertise a request for 2.4
V p-p transmit level operation (if B10L_TX_LVL_HI_ABLE = 1). This
is set using the 10BASE-T1L high level transmit operating mode
request bit (AN_ADV_B10L_TX_LVL_HI_REQ). 0 = request 1.0 V
p-p transmit level, and 1 = request 2.4 V p-p transmit level.
The link partner advertised transmit level ability can be read in
the link partner 10BASE-T1L high level transmit operating mode
ability register bit (AN_LP_ADV_B10L_TX_LVL_HI_ABL). The link
partner advertised transmit level request can be read in the link
partner 10BASE-T1L high level transmit operating mode request
register bit (AN_LP_ADV_B10L_TX_LVL_HI_REQ). These bits are
updated during the autonegotiation process and are valid when the
autonegotiation complete register bit (AN_COMPLETE) is set.
Operation at the 1.0 V p-p transmit level operation occurs if either
the local or remote PHY advertises that it is not capable of transmit-
ting in the high level (2.4 V p-p) transmit operating mode, or if
neither the local nor remote PHY advertises a request for high level
(2.4 V p-p) transmit operating mode.
Operation at the 2.4 V p-p transmit level occurs if both the local
and remote PHY advertises that they are capable of transmitting in
the high level (2.4 V p-p) transmit operating mode, and if either the
local or remote PHY advertises a request for high level (2.4 V p-p)
transmit operating mode.
Therefore, a PHY can ensure it must operate at 1.0 V p-p transmit
level, but it can only request operation at the 2.4 V p-p transmit
level.
Table 16. Determination of Transmit Level by Autonegotiation1
HI_ABL2
HI_REQ
LP_HI_ABL
LP_HI_REQ
Transmit Level
0
X
0
X
1.0 V p-p
1
X
0
X
1.0 V p-p
0
X
1
X
1.0 V p-p
1
0
1
0
1.0 V p-p
1
0
1
1
2.4 V p-p
1
1
1
0
2.4 V p-p
1
1
1
1
2.4 V p-p
1 X means don't care.
2 HI_ABL, HI_REQ, LP_HI_ABL, and LP_HI_REQ refer to the advertisement bits
AN_LP_ADV_B10L_TX_LVL_HI_ABL, AN_LP_ADV_B10L_TX_LVL_HI_REQ,
AN_ADV_B10L_TX_LVL_HI_ABL, and AN_ADV_B10L_TX_LVL_HI_REQ, re-
spectively.
Advertisement of Leader/Follower
The 10BASE-T1L standard uses what is known as a leader/follower
clock scheme. This scheme is commonly used in full duplex trans-
ceiver standards using echo cancellation. One PHY is designated
as the leader and the other PHY as the follower. Autonegotiation is
used to agree which PHY is the leader and which is the follower,
and it generally doesn’t matter which PHY is which.
The ADIN1111 has an internal pull-down resistor on the MS_SEL
pin, which results in a default setting of configuring the PHY to
advertise prefer follower. It is recommended to either use the
default setting of advertise prefer follower or to use a setting of
advertise prefer leader.
If it is mandatory for the PHY to operate as leader, use an advertise
forced leader configuration. However, this configuration must be
used with caution because if remote end is also forced leader, there
is a configuration fault, autonegotiation fails, and the link is not
brought up.
The force leader/follower configuration register bit
(AN_ADV_FORCE_MS) is used to configure the PHY to advertise
its leader/follower configuration as a preference or as a forced
value, as follows: 0 = leader/follower configuration is a preferred
mode, and 1 = leader/follower configuration is a forced mode.
The leader/follower configuration register bit (AN_ADV_MST) is
used to configure the PHY to advertise its leader/follower configura-
tion, as follows: 0 = follower and 1 = leader.
The link partner advertised leader/follower setting can be read
in the link partner force leader/follower configuration register bit
(AN_LP_ADV_FORCE_MS) and the link partner leader/follower
configuration register bit (AN_LP_ADV_MST). These bits are up-
dated during the autonegotiation process and are valid when the
autonegotiation complete register bit (AN_COMPLETE) is set.
When the local and remote PHY have the same preferred configu-
ration (for example, both follower or both leader), a random process
is used to determine which is the leader and which is the follower.
When one PHY has a forced configuration, its leader/follower con-
figuration is given priority over a PHY with a preferred setting where
both PHYs have the same leader/follower configuration. If both
PHYs have a forced configuration and the same leader/follower
configuration, configuration fault occurs and autonegotiation fails.
The resolution of leader/follower can be read using the leader/fol-
lower resolution result register bits (AN_MS_CONFIG_RSLTN).
This result indicates if the PHY is configured as a follower or a
leader or if there was a configuration fault. These bits are updated
during the autonegotiation process and are valid when the autone-
gotiation complete register bit (AN_COMPLETE) is set.



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