Data Sheet

ADP1763

ABSOLUTE MAXIMUM RATINGS

analog.com

Rev. E | 6 of 22

Table 3.

Parameter

Rating

VIN to GND

−0.3 V to +2.16 V

EN to GND

−0.3 V to +3.96 V

VOUT to GND

−0.3 V to VIN

SENSE to GND

−0.3 V to VIN

VREG to GND

−0.3 V to VIN

REFCAP to GND

−0.3 V to VIN

VADJ to GND

−0.3 V to VIN

SS to GND

−0.3 V to VIN

PG to GND

−0.3 V to +3.96 V

Storage Temperature Range

−65°C to +150°C

Operating Temperature Range

−40°C to +125°C

Operating Junction Temperature

125°C

Lead Temperature (Soldering, 10 sec)

300°C

Stresses at or above those listed under Absolute Maximum Ratings

may cause permanent damage to the product. This is a stress

rating only; functional operation of the product at these or any other

conditions above those indicated in the operational section of this

specification is not implied. Operation beyond the maximum operat-

ing conditions for extended periods may affect product reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in combina-

tion. The ADP1763 can be damaged when the junction temperature

limits are exceeded. The use of appropriate thermal management

techniques is recommended to ensure that the maximum junction

temperature does not exceed the limits shown in Table 3.

Use the following equation to calculate the junction temperature

(TJ) from the board temperature (TBOARD) or package top tempera-

ture (TTOP)

TJ = TBOARD + (PD × ΨJB)

TJ = TTOP + (PD × ΨJT)

ΨJB is the junction to board thermal characterization parameter and

ΨJT is the junction to top thermal characterization parameter with

units of °C/W.

ΨJB of the package is based on modeling and calculation using

a 4-layer board. JESD51-12, Guidelines for Reporting and Using

Electronic Package Thermal Information, states that thermal char-

acterization parameters are not the same as thermal resistances.

ΨJB measures the component power flowing through multiple ther-

mal paths rather than a single path as in thermal resistance, θJB.

Therefore, ΨJB thermal paths include convection from the top of the

package as well as radiation from the package, factors that make

ΨJB more useful in real-world applications.

THERMAL RESISTANCE/PARAMETER

Values shown in Table 4 are calculated in compliance with JEDEC

standards for thermal reporting. θJA is the natural convection junc-

tion to ambient thermal resistance measured in a one cubic foot

sealed enclosure. θJC is the junction to case thermal resistance. θJB

is the junction to board thermal resistance. ΨJB is the junction to

board thermal characterization parameter. ΨJT is the junction to top

thermal characterization parameter.

In applications where high maximum power dissipation exists,

close attention to thermal board design is required. Thermal resist-

ance/parameter values may vary, depending on the PCB material,

layout, and environmental conditions.

Table 4. Thermal Resistance/Parameter

Package

Type

θJA

θJB

θJC-T

θJC-B ΨJB

ΨJT

Unit

CP-16-221

50.95

29.31

49.53

8.53

29.31

0.3

°C/W

1 Thermal resistance/parameter simulated values are based on a JEDEC 2S2P

thermal test board for ΨJT, ΨJB, θJA and θJB and a JEDEC 1S0P thermal test

board for θJC with four thermal vias. See JEDEC JESD51-12.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Charged devi-

ces and circuit boards can discharge without detection. Although

this product features patented or proprietary protection circuitry,

damage may occur on devices subjected to high energy ESD.

Therefore, proper ESD precautions should be taken to avoid

performance degradation or loss of functionality.