Data Sheet

ADP1763

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

analog.com

Rev. E | 7 of 22

Figure 3. Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1 to 4

VIN

Regulator Input Supply. Bypass VIN to GND with a 10 µF or greater capacitor. Note that all four VIN pins must be connected to the source

supply.

5

REFCAP

Reference Filter Capacitor. Connect a 1 µF capacitor from the REFCAP pin to ground. Do not connect a load to ground.

6

VREG

Regulated Input Supply to LDO Amplifier. Bypass VREG to GND with a 1 µF or greater capacitor. Do not connect a load to ground.

7

GND

Ground.

8

VADJ

Adjustable Voltage Pin for the Adjustable Output Option. Connect a 10 kΩ external resistor between the VADJ pin and ground to set the

output voltage to 1.5 V. For the fixed output option, leave this pin floating.

9 to 12

VOUT

Regulated Output Voltage. Bypass VOUT to GND with a 10 µF or greater capacitor. Note that all four VOUT pins must be connected to the

load.

13

SENSE

Sense Input. The SENSE pin measures the actual output voltage at the load and feeds it to the error amplifier. Connect VSENSE as close

to the load as possible to minimize the effect of IR voltage drop between VOUT and the load.

14

SS

Soft Start Pin. A 10 nF capacitor connected to the SS pin and ground sets the start-up time to 0.6 ms.

15

PG

Power-Good Output. This open-drain output requires an external pull-up resistor. If the device is in shutdown mode, current-limit mode, or

thermal shutdown mode, or if VOUT falls below 90% of the nominal output voltage, the PG pin immediately transitions low.

16

EN

Enable Input. Drive the EN pin high to turn on the regulator. Drive the EN pin low to turn off the regulator. For automatic startup, connect the

EN pin to the VIN pin.

EP

Exposed Pad. The exposed pad is electrically connected to GND. It is recommended that this pad be connected to a ground plane on the

PCB. The exposed pad is on the bottom of the package.