ST10F271B datasheet(18/180 Pages) STMICROELECTRONICS

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Pin data

ST10F271B/ST10F271E

18/180

EA / VSTBY

External access enable pin.

A low level applied to this pin during and after Reset forces the ST10F271 to start

the program from the external memory space. A high level forces ST10F271 to

start in the internal memory space. This pin is also used (when Stand-by mode is

entered, that is ST10F271 under reset and main VDD turned off) to bias the 32

kHz oscillator amplifier circuit and to provide a reference voltage for the low-

power embedded voltage regulator which generates the internal 1.8V supply for

the RTC module (when not disabled) and to retain data inside the Stand-by

portion of the XRAM (16Kbyte).

It can range from 4.5 to 5.5V (6V for a reduced amount of time during the device

life, 4.0V when RTC and 32 kHz on-chip oscillator amplifier are turned off). In

running mode, this pin can be tied low during reset without affecting 32 kHz

oscillator, RTC and XRAM activities, since the presence of a stable VDD

guarantees the proper biasing of all those modules.

P0L.0 -P0L.7,

P0H.0

P0H.1 -

P0H.7

100-107,

108,

111-117

I/O

Two 8-bit bidirectional I/O ports P0L and P0H, bit-wise programmable for input or

output via direction bit. Programming an I/O pin as input forces the corresponding

output driver to high impedance state. The input threshold of Port 0 is selectable

(TTL or CMOS).

In case of an external bus configuration, PORT0 serves as the address (A) and

as the address / data (AD) bus in multiplexed bus modes and as the data (D) bus

in demultiplexed bus modes.

Demultiplexed bus modes

Multiplexed bus modes

Table 1.

Pin description (continued)

Symbol

Type

Function

Data path width

8-bit

16-bi

P0L.0 – P0L.7:

D0 – D7

D0 - D7

P0H.0 – P0H.7:

I/O

D8 - D15

Data path width

8-bit

16-bi

P0L.0 – P0L.7:

AD0 – AD7

AD0 - AD7

P0H.0 – P0H.7:

8 – A15

D8 - AD15

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