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ST10F271B 数据表(PDF) 28 Page - STMicroelectronics |
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ST10F271B 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 180 page  Internal Flash memory ST10F271B/ST10F271E 28/180 The table above refers to the configuration when bit ROMS1 of SYSCON register is set. When Bootstrap mode is entered: ● Test-Flash is seen and available for code fetches (address 00’0000h) ● User I-Flash is only available for read and write accesses ● Write accesses must be made with addresses starting in segment 1 from 01'0000h, whatever ROMS1 bit in SYSCON value ● Read accesses are made in segment 0 or in segment 1 depending of ROMS1 value. In Bootstrap mode, by default ROMS1 = 0, so the first 32KBytes of IFlash are mapped in segment 0. Example: In default configuration, to program address 0, user must put the value 01'0000h in the FARL and FARH registers, but to verify the content of the address 0 a read to 00'0000h must be performed. Next Table 6: Control register interface shows the Control Register interface composition: this set of registers can be addressed by the CPU. 5.2.3 Low power mode The Flash module is automatically switched off executing PWRDN instruction. The consumption is drastically reduced, but exiting this state can require a long time (tPD). Recovery time from Power Down mode for the Flash modules is anyway shorter than the main oscillator start-up time. To avoid any problem in restarting to fetch code from the Flash, it is important to size properly the external circuit on RPD pin. Note: PWRDN instruction must not be executed while a Flash program/erase operation is in progress. 1. IFlash sectors B0F6 and B0F7 are not physically disabled. The corresponding area must be reserved by the application mapping. Accesses to this area will send back the content of the Flash cell ( by default FFFFh: the erased state, if not modified by user). Table 6. Control register interface Name Description Addresses Size Bus size FCR1-0 Flash Control Registers 1-0 0x0008 0000 - 0x0008 0007 8 byte 16-bit FDR1-0 Flash Data Registers 1-0 0x0008 0008 - 0x0008 000F 8 byte FAR Flash Address Registers 0x0008 0010 - 0x0008 0013 4 byte FER Flash Error Register 0x0008 0014 - 0x0008 0015 2 byte FNVWPIR Flash Non Volatile Protection I Register 0x0008 DFB0 - 0x0008 DFB1 2 byte FNVAPR0 Flash Non Volatile Access Protection Register 0 0x0008 DFB8 - 0x0008 DFB9 2 byte FNVAPR1 Flash Non Volatile Access Protection Register 1 0x0008 DFBC - 0x0008 DFBF 4 byte XFVTAUR0 XBus Flash Volatile Temporary Access Unprotection Register 0 0x0000 EB50 - 0x0000 EB51 2 byte |
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