Data Sheet

ADA4352-2

analog.com

Rev 0

28 of 47

THEORY OF OPERATION

OVERVIEW

The ADA4352-2 is a small, dual-channel programmable gain transimpedance amplifier (PGTIA) offering four

selectable integrated feedback gain resistor selections for each of the two channels. The ADA4352-2 features a core

amplifier with low offset and offset drift, low gain drift, low noise, and low input bias current. A simple gain

calibration removes the DC error contributed by the tolerance of the integrated feedback resistors. Gain selection is

done via proprietary switches that outperform typical CMOS switches of similar size and on-resistance. The

switches are arranged in a Kelvin configuration that removes the added switch on-resistance and its nonlinear

behavior from the signal path. Each channel’s four feedback paths are internally compensated, which eliminates

the need for external compensation capacitors. Additionally, the ADA4352-2 is capable of directly driving an ADC,

eliminating the need for a separate ADC driver, and thus reducing the PCB footprint of the overall signal chain.

The analog circuitry can operate on either a single supply (+2.7 V to +5.5 V) or dual supplies (±1.35 V to ±2.75 V). The

digital inputs (switch control) operate on supplies between 1.62 V and 5.5 V to interface directly with standard logic

levels (1.8 V, 3.3 V, or 5 V) based on the voltage applied to the digital supply (DVSS and DVDD) pins. The voltage

levels required for a logic low (VIL) or high (VIH) value are relative to the corresponding digital rail (DVSS and DVDD)

(see Table 1 and Table 2 for more information).

The switches for channel A and channel B of the ADA4352-2 are controlled by the digital input pins, SW SEL0 A, SW

SEL1 A, SW SEL0 B, and SW SEL1 B, respectively. The digital supplies included in the ADA4352-2 provide additional

flexibility to control the switch logic independently from the analog supply range. The four internal switch

selections are make-before-break to maintain a closed feedback loop during switching to reduce output overdrive

glitches that occur otherwise. The SWSEL pins have internal pull-down resistors to DVSS, so the ADA4352-2 defaults

to its lowest gain configuration (315 Ω) if the gain select pins are left floating.

To simplify terminology, because the two amplifiers inside the ADA4352-2 are interchangeable, RF0, RF1 RF2, RF3, SW

SEL0, SW SEL1, +IN, and −IN refer to channel A or channel B. OUT refers to OUT A or OUT B.