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ADA4352-2ACPZ-R7 数据表(PDF) 34 Page - Analog Devices |
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ADA4352-2ACPZ-R7 数据表(HTML) 34 Page - Analog Devices |
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34 / 47 page ![]() Data Sheet ADA4352-2 analog.com Rev 0 34 of 47 shunt supply clamps to protect its two supply domains, AVDD/AVSS and DVDD/DVSS. The ADA4352-2 has a pair of back-to-back diodes to protect the inputs during ESD strikes. Figure 74. Simplified Internal ESD Schematic Diagram MAIN AMPLIFIER (CMOS) Rail-to-Rail Output Stage The maximum detectable signal in the PGTIA is limited by the input and output operating range of the amplifier. To maintain the best accuracy, the common-mode voltage VCM at the noninverting input must be biased at least 0.1 V above the negative supply. The negative supply (AVSS) must be less than ground (0 V) for PGTIA applications that require the output to swing all the way to ground. This configuration is possible for the ADA4352-2, because the digital supplies (DVDD and DVSS) and analog supplies (AVDD and AVSS) are independent. The ADA4352-2 is designed with a rail-to-rail output stage and can operate to within 100 mV from the power supplies with AVOL> 110 dB, which provides flexibility for the system and eases design constraints. Bottom Rail Input Stage The VCM is constrained by the input common-mode range of the main amplifier. In a single-supply configuration, VCM also sets the minimum output voltage value in a TIA design. Therefore, the dynamic range is constrained between VCM and the maximum ADC input voltage. The ADA4352-2 is designed with a PMOS input differential pair to allow the analog inputs to swing to AVSS, where AVSS can be set to as much as 0.5 V less than DVSS. It is less common in TIA designs for the input common-mode voltage across the inputs to approach the positive supply. The ADA4352-2 input stage requires 1.5 V headroom to the positive supply. Low Noise Operation In a transimpedance amplifier, having low op-amp input voltage noise is particularly crucial. At low frequency, the noise gain is near 1 V/V. However, at higher frequencies, the noise gain increases from unity due to source capacitance. Additionally, more noise is integrated (per decade) at higher frequencies, which contributes to the total output integrated noise. While there is usually a design trade-off between noise and power consumption, the ADA4352-2 contributes 7.3 nV/√Hz of wideband noise while requiring only 3.3 mA per channel. –IN OUT AVDD AVSS DVDD DVSS ½ ADA4352-2 SW SEL0 A GAIN NETWORK SUPPLY CLAMP SUPPLY CLAMP SUPPLY CLAMP +IN SW SEL1 A |
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