CDCS503-Q1

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SCAS924B – MARCH 2012 – REVISED JUNE 2012

RECOMMENDED OPERATING CONDITIONS

MIN

NOM

MAX

UNIT

VDD

Supply voltage

3

3.6

V

FS = 0

8

32

fIN

Input frequency

MHz

FS = 1

8

27

VIL

Low-level input voltage LVCMOS

0.3 VDD

V

VIH

High-level input voltage LVCMOS

0.7 VDD

V

VI

Input voltage threshold LVCMOS

0.5 VDD

V

CL

Output load test LVCMOS

15

pF

IOH/IOL

Output current

±12

mA

TA

Operating free-air temperature

–40

105

°C

DEVICE CHARACTERISTICS

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fout = 20 MHz; FS = 0, no SSC

19

IDD

Device supply current

mA

fout = 70 MHz; FS = 1, SSC = 2%

22

FS = 0

8

32

fOUT

Output frequency

MHz

FS = 1

32

108

IIH

LVCMOS input current

VI = VDD; VDD = 3.6 V

10

μA

IIL

LVCMOS input current

VI = 0 V; VDD = 3.6 V

–10

μA

IOH = - 0.1 mA

2.9

VOH

LVCMOS high-level output voltage

IOH = - 8 mA

2.4

V

IOH = - 12 mA

2.2

IOL = 0.1 mA

0.1

VOL

LVCMOS low-level output voltage

IOL = 8 mA

0.5

V

IOL = 12 mA

0.8

IOZ

High-impedance-state output current

OE = Low

–2

2

μA

tJIT(C-C)

Cycle to cycle jitter(1)

fout = 108 MHz; FS = 1,

110

ps

SSC = 1%, 10000 Cycles

tr/tf

Rise and fall time(1)

20%–80%

0.75

ns

Odc

Output duty cycle(2)

45%

55%

fMOD

Modulation frequency

30

kHz

(1)

Measured with Test Load, see Figure 3.

(2)

Not production tested.

Copyright © 2012, Texas Instruments Incorporated

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