GND

OUT

IN

FS

LVCMOS

Control

Logic

OE

LV

CMOS

VDD

SSC_SEL 0

SSC_SEL 1

x1orx4

/SSC

1

8

2

7

3

6

4

5

CDCS503-Q1

IN

SSC_SEL 0

SSC_SEL 1

GND

VDD

OE

OUT

FS

CDCS503-Q1

www.ti.com

SCAS924B – MARCH 2012 – REVISED JUNE 2012

Clock Buffer/Clock Multiplier With Optional SSC

Check for Samples: CDCS503-Q1

1

FEATURES

•

Qualified for Automotive Applications

•

Output Disable Through Control Pin

•

AEC-Q100 Test Guidance With the Following

•

Single 3.3 V Device Power Supply

Results:

•

Wide Temperature Range –40°C to 105°C

–

Device Temperature Grade 2

•

Low Space Consumption 8-Pin TSSOP

–

-40°C to 105°C Ambient Operating

Package

Temperature Range

APPLICATIONS

–

Device HBM ESD Classification Level H2

•

Automotive Applications Requiring EMI

–

Device CDM ESD Classification Level C3B

Reduction Through SSC and/or Clock

•

Part of a Family of Easy to Use Clock

Multiplication

Generator Devices With Optional Spread

Spectrum Clocking (SSC)

•

Clock Multiplier With Selectable Output

Frequency and Selectable SSC

•

SSC Controllable Through Two External Pins

–

±0%, ±0.5%, ±1%, ±2% Center Spread

•

Frequency Multiplication Selectable Between

x1 or x4 With One External Control Pin

Figure 1. BLOCK DIAGRAM

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2012, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.