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WM8994ECS/R 数据表(PDF) 126 Page - Cirrus Logic |
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WM8994ECS/R 数据表(HTML) 126 Page - Cirrus Logic |
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126 / 363 page ![]() WM8994 126 Rev 4.6 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R29 (001Dh) Right Output Volume 8 HPOUT1_VU N/A Headphone Output PGA Volume Update Writing a 1 to this bit will update HPOUT1LVOL and HPOUT1RVOL volumes simultaneously. 7 HPOUT1R_ZC 0 HPOUT1RVOL (Right Headphone Output PGA) Zero Cross Enable 0 = Zero cross disabled 1 = Zero cross enabled 6 HPOUT1R_MUTE_N 1 HPOUT1RVOL (Right Headphone Output PGA) Mute 0 = Mute 1 = Un-mute 5:0 HPOUT1R_VOL [5:0] 2Dh (-12dB) HPOUT1RVOL (Right Headphone Output PGA) Volume -57dB to +6dB in 1dB steps 00_0000 = -57dB 00_0001 = -56dB … (1dB steps) 11_1111 = +6dB (See Table 65 for output PGA volume control range) R46 (002Eh) Output Mixer (2) 8 DAC1R_TO_HPOUT1 R 0 HPOUT1RVOL (Right Headphone Output PGA) Input Select 0 = MIXOUTR 1 = DAC1R Table 63 Headphone Output PGA (HPOUT1LVOL, HPOUT1RVOL) Control |
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