TDA7546 datasheet(23/68 Pages) STMICROELECTRONICS

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TDA7546

Functional description

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The circuit receives the scaling factors for the programmable counters and the values of the

reference frequencies via an I2C-Bus interface.The reference frequency is generated by an

adjustable internal (XTAL) oscillator followed by the reference divider. The main reference

and step-frequencies are free selectable (RC, PC).

Output signals of the phase detector are switching the programmable current sources. The

loop filter integrates their currents to a DC voltage.

The values of the current sources are programmable by 6 bits also received via the I2C Bus

(A, B, CURRH).

To minimize the noise induced by the digital part of the system, a special guard

configuration is implemented. The loop gain can be set for different conditions by setting the

current values of the chargepump generator.

Frequency generation for phase comparison

The RF signals applies a two modulus counter (32/33) pre-scaler, which is controlled by a 5-

bit A-divider. The 5-bit register (PC0 to PC4) controls this divider. In parallel the output of the

prescaler connects to an 11-bit B-divider. The 11-bit PC register (PC5 to PC15) controls this

divider

Dividing range:

fVCO = [33 x A + (B + 1 - A) x 32] x fREF

fVCO = (32 x B + A + 32) x fREF

Important: For correct operation: A ≤ 32; B ≥ A

Three state phase comparator

The phase comparator generates a phase error signal according to phase difference

between fSYN and fREF. This phase error signal drives the charge pump current generator.

Charge pump current generator

This system generators signed pulses of current. The phase error signal decides the

duration and polarity of those pulses. The current absolute values are programmable by A

Inlock detector

Switching the chargepump in low current mode can be done either via software or

automatically by the inlock detector, by setting bit LDENA to "1".

After reaching a phase difference about lower than 40nsec the chargepump is forced in low

current mode. A new PLL divider alternation by I2C-Bus will switch the chargepump in the

high current mode.

Low noise CMOS op-amp

An internal voltage divider at pin VREF2 connects the positive input of the low noise op-

amp. The charge pump output connects the negative input. This internal amplifier in

cooperation with external components can provide an active filter.

While the high current mode is activated LPHC output is switched on.

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