PIC18(L)F2X/4X/6XK40

DS40001735C-page 4

Advance Information

 2013-2016 Microchip Technology Inc.

PIN DIAGRAMS

FIGURE 1:

28-PIN PDIP, SOIC, SSOP PIN DIAGRAM FOR PIC18(L)F24K40, PIC18(L)F25K40,

PIC18(L)F26K40, PIC18(L)F27K40

FIGURE 2:

28-PIN UQFN (4x4x0.5 mm), QFN (6x6x0.9 mm) PIN DIAGRAM FOR

PIC18(L)F24K40, PIC18(L)F25K40, PIC18(L)F26K40, PIC18(L)F27K40

PIC18(L)F24K40

PIC18(L)F25K40

PIC18(L)F26K40

PIC18(L)F27K40

1

2

3

4

5

6

7

8

9

10

VPP/MCLR/RE3

RA0

RA1

RA2

RA3

RA4

RA5

RB6/ICSPCLK

RB5

RB4

RB3

RB2

RB1

RB0

VDD

VSS

11

12

13

14

15

16

17

18

19

20

28

27

26

25

24

23

22

21

VSS

RA7

RA6

RC0

RC1

RC2

RC3

RC5

RC4

RC7

RC6

RB7/ICSPDAT

Note:

See Table 3 for location of all peripheral functions.

2

3

6

1

18

19

20

21

15

7

16

17

5

4

RB0

VDD

VSS

RC7

RA2

RA3

RA4

RA5

VSS

RA7

RA6

910

13

814

12

11

27 26

23

28

22

24

25

RB3

RB2

RB1

PIC18(L)F24K40

PIC18(L)F25K40

PIC18(L)F26K40

PIC18(L)F27K40

Note 1:

See Table 3 for location of all peripheral functions.

2:

It is recommended that the exposed bottom pad be connected to VSS.