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SN260 数据表(PDF) 82 Page - STMicroelectronics

部件名 SN260
功能描述  ZigBee® 802.15.4 network processor
PDF  88 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

SN260 数据表(HTML) 82 Page - STMicroelectronics

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Typical application
SN260
82/88
9
Typical application
Figure 12 illustrates the typical application circuit for the SN260. This figure does not contain
all decoupling capacitance required by the SN260. The Balun provides the impedance
transformation from the antenna to the SN260 for both TX and RX modes. The harmonic
filter provides additional suppression of the second harmonic, which increases the margin
over the FCC limit. The 24MHz crystal with loading capacitors is required and provides the
high frequency source for the SN260. The RC debounce filter (R4 and C7) is suggested to
improve the noise immunity of the nRESET logic (Pin 11).
The SIF (nSIF_LOAD, SIF_MOSI, SIF_MISO, and SIF_CLK) and packet trace signals
(PTI_EN and PTI_TXD) should be brought out test points or, if space permits to a 10-pin,
dual row, 0.05-inch pitch header footprint. With a header populated, a direct connection to
the InSight Adapter is possible which enhances the debug capability of the SN260. For more
information, refer to www.stmcu.com.
Figure 12.
Typical application circuit
Table 120 contains the bill of materials for the application circuit shown in Figure 12.
L1
R1
C4
C5
X1
1.8V
C6
Programming and
Debug Interface (these
pins should be routed
to test points)
Serial Interface
(route to Host uP)
Route to LED
or leave unconnected
VDD_VCO
RF_P
VDD_RF
RF_N
RF_TX_ALT_P
RF_TX_ALT_N
VDD_IF
BIAS_R
VDD_PADSA
TX_ACTIVE
nSIF_LOAD
SIF_MOSI
SIF_MISO
SIF_CLK
nHOST_INT
RES
VDD_PADS
PTI_DATA
PTI_EN
nSSEL
11 12 13 14 15 16 17 18 19 20
10
9
8
7
6
5
4
3
2
1
21
22
23
24
25
26
27
28
29
30
40 39 38 37 36 35 34 33 32 31
41
GND
EM260
U1
Ceramic
Balun (BLN1)
L2
C2
C1
C3
1.8V
Harmonic
Filter
R2
C7
R4
VDD_PADS
(2.1V to 3.6V)
R3
VDD_PADS
(2.1V to 3.6V)
SN260



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