SLAS366 datasheet(15/56 Pages) TI2

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3–3

3.3.1

MIC Input

TLV320AIC15 supports single-ended microphone input. This can be used by connecting the external single-ended

source through ac-coupling to the MICIN pin. This channel is selected by writing 01 or 10 into bits D2–D1 in control

Writing 01 into bits D2–D1 chooses self biased MICIN mode. In this mode the device internally self-biases the input

at 1.35 V. For best noise performance the user must bias the microphone circuit using the BIAS voltage generated

by the device as shown in Figure 5–19.

Writing 10 into bits D2–D1 chooses pseudodifferential MICIN mode. In this mode the single-ended input is connected

through ac-coupling to MICIN and the bias voltage used to generate the signal is also ac-coupled to INM1 as shown

in Figure 5–20. For best noise performance the MICIN and INM1 lines are routed in similar fashion from the

microphone to the device for noise cancellation.

For high quality performance the single-ended signal is converted internally into differential signal before being

converted. To improve the dynamic range with different types of microphones the device supports a pre-amplifier with

gain settings of 0/6/12/24 dB. This can be chosen by writing into bits D1–D0 of control register 5C.

TLV320AIC15

BIAS

MICIN

10 k

Ω

0.1

µF

Electret

Microphone

BIAS

MICIN

INM1

0.1

µF

10 k

Ω

0.1

µF

Electret

Microphone

(a) Single Ended

(b) Pseudo -Differential (High Quality)

Figure 3–1. Microphone Interface

3.3.2

INP and INM Input

To produce common-mode rejection of unwanted signal performance, the analog signal is processed differentially

until it is converted to digital data. The signal applied to the terminals INM1/2 and INP1/2 are differential to preserve

device specifications (see Figure 3–2). The signal source driving analog inputs (INP1/2 and INM1/2) should have low

source impedance for lowest noise performance and accuracy. To obtain maximum dynamic range, the signal should

be ac-coupled to the input terminal.

INP1 or INP2

INM1 or INM2

1.35 V

TLV320AIC15

V(INP)

V(INM)

Figure 3–2. INP and INM Internal Self-Biased Circuit

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