SLAS366 datasheet(49/56 Pages) TI2

49 / 56 page

5–13

BIAS

0.1

µF

0.1

µF

0.1

µF

MICIN

INP1

INM1

INP2

INM2

0.1

µF

Microphone

0.1

µF

OUTP1

µF

OUTM1

600

Ω

600

Ω

AVDD

0.1

µF

AVSS

3.3-V Analog Supply

Analog GND

0.1

µF

3.3-V Analog Supply

Analog GND

DRVDD

DRVSS

IOVDD

1 k

Ω

1 k

Ω

IOVDD

M/S

FSD

DIN

DOUT

SCLK

From DSP or

Other Clock Source

From DSP

MCLK

RESET

PWRDN

SDA

IOVDD

1 k

Ω

From DSP

SCL

0.01

µF

0.1

µF

0.01

µF

0.1

µF

DVDD

DVSS

IOVDD

IOVSS

To 1.8-V Digital Supply

To Digital GND

To 3.3-V Digital Supply

To Digital GND

TLV320AIC15

FSK

FSR

CLKR

CLKX

TLV320C5X

Figure 5–20. Pseudo-Differential Microphone Input (External Common Mode)

5.12 Layout and Grounding Guidelines for TLV320AIC15

TLV320AIC15 has a built-in analog antialias filter, which provides rejection to external noise at high frequencies that

may couple into the device. Digital filters with high out-of-band attenuation also reject the external noise. If the

differential inputs are used for the ADC channel, then the noise in the common-mode signal is also rejected by the

high CMRR of TLV320AIC15. Using external common-mode for microphone inputs also helps reject the external

noise. However to extract the best performance from TLV320AIC15, care must be taken in board design and layout

to avoid coupling of external noise into the device.

TLV320AIC15 supports clock frequencies as high as 100 MHz. To avoid coupling of fast switching digital signals to

analog signals, the digital and analog sections should be separated on the board. In TLV320AIC15 the digital and

analog pins are kept separated to aid such a board layout. A separate analog ground plane should be used for the

analog section of the board. The analog and digital ground planes should be shorted at only one place as close to

TLV320AIC15 as possible. No digital trace should run under TLV320AIC15 to avoid coupling of external digital noise

into the device. It is suggested to have the analog ground plane running below the TLV320AIC15. The power supplies

should be decoupled close to the supply pins, preferably, with 0.1

µF ceramic capacitor and 10 µF tantalum capacitor

following. The ground pin should be connected to the ground plane as close as possible to the TLV320AIC15, so as

to minimize any inductance in the path. Since the MCLK is expected to be a very high frequency signal, it is advisable

to shield it with digital ground.

For best performance of ADC in differential input mode, the differential signals must be routed close to each other

in similar fashion, so that the noise coupling on both the signals is the same and can be rejected by the device.

SLAS366 数据表(PDF) 49 Page - Texas Instruments

SLAS366 数据表(HTML) 49 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

数据表下载

链接网址

SLAS366 数据表(PDF) 49 Page - Texas Instruments

SLAS366 数据表(HTML) 49 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

数据表 下载

链接网址

数据表下载