IP175C/IP175C LF/IP175CH/IP175CH LF
Data Sheet
37/111
Mar 09, 2007
Copyright © 2004, IC Plus Corp.
IP175C/IP175CH-DS-R14
To define the speed, duplex and pause of MII port
The speed and duplex of MII port can be configured through pins or registers. IP175C/IP175CH’s MII
register is not fully compatible to IP175A’s. User has to fill MII register 29.31 with 16’h175C before
accessing MII registers. The details are shown in the following tables.
MII0 PHY mode (interface to an external MAC, MII registers can be accessed via MDC0, MDIO0)
EEPROM
MII register
Pin
Name
Reg
Name
Phy
Reg
MII0 speed
P4_FORCE_100
P4_FORCE_100
20.4
P4_FORCE_100
29
22.10
MII0 duplex
P4_FORCE_FULL P4_FORCE_FULL
21.4
P4_FORCE_FULL
29
22.5
MII0 pause
--
MAC_X_EN
4.3
MAC_X_EN
29
18.10
MII0 MAC mode (interface to an external PHY), there are two ways to set MII0 speed, duplex and pause.
1. Decided by reading the MII registers 0~5 of external PHY through MDC1, MDIO1.
MII0
Speed
Duplex
Pause
1.
IP175C/IP175CH polls the external PHY with address defined in MII register
31.3[4:0]. The default address value is 00000.
2.
After reset, IP175C/IP175CH writes the speed/duplex/pause capability to the
external PHY using the content of MII register 31.3[12:8].
3.
IP175C/IP175CH reads MII register 0~5 of external PHY as MII0 speed,
duplex and pause continuously.
2. Force mode (MDC1 and MDIO1 are not connected to external PHY)
EEPROM
MII register
Pin
Name
Reg
Name
Phy
Reg
MII0 speed
P4_FORCE_100
P4_FORCE_100
20.4
P4_FORCE_100
29
22.10
MII0 duplex
P4_FORCE_FULL P4_FORCE_FULL
21.4
P4_FORCE_FULL
29
22.5
MII0 pause
--
MAC_X_EN
4.3
MAC_X_EN
29
18.10
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