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IP175C/IP175C LF/IP175CH/IP175CH LF
Data Sheet
65/111
Mar 09, 2007
Copyright © 2004, IC Plus Corp.
IP175C/IP175CH-DS-R14
MII register 6 of PHY0~4 (Each PHY has its own MII register 6 with different PHY address)
PHY
MII
ROM
R/W
Description
Default
Auto-Negotiation Expansion register
4~0
6[15:5]
--
RO
Reserved
0
4~0
6.4
--
RO
1: a fault has been detected via parallel detection function.
0: a fault has not been detected via parallel detection function.
0
4~0
6.3
--
RO
1= Link partner is next page able.
0= Link partner is not next page able.
0
4~0
6.2
--
RO
1: IP175C/IP175CH next page able.
0: IP175C/IP175CH is not next page able.
This bit is fixed to be “0” in IP175C/IP175CH
0
4~0
6.1
--
RO/
LH
1: A new page has been received.
0: A new page has not been received.
0
4~0
6.0
--
RO
If Nway is enabled, this bit means:
1: Link partner is Auto-Negotiation able.
0: Link partner is not Auto-Negotiation able.
In 100FX or Nway disabled, this bit always =0.
0
(Nway)
(100FX)
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