ADC12DL080

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SNAS345A – FEBRUARY 2006 – REVISED APRIL 2013

Converter Electrical Characteristics

(1)(2)(3) (continued)

Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR =

+2.5V, PD = 0V, External VREF = +1.0V, fCLK = 80 MHz, fIN = 40 MHz, CL = 10 pF/pin, Duty Cycle Stabilizer On. Boldface

limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C

Units

Parameter

Test Conditions

Typical(4)

Limits(4)

(Limits)

fIN = 40 MHz, VIN = −1 dBFS

−82

-74

dBc (min)

H3

Third Harmonic Distortion

fIN = 200 MHz, VIN = −1 dBFS

−81

dBc

fIN = 40 MHz, VIN = −1 dBFS

82

73

dBc (min)

SFDR

Spurious Free Dynamic Range

fIN = 200 MHz, VIN = −1 dBFS

81

dBc

fIN = 19.6 MHz and 20.2 MHz, each =

IMD

Intermodulation Distortion

−70

dBFS

−6.5 dBFS

INTER-CHANNEL CHARACTERISTICS

Channel—Channel Offset Match

±0.3

%FS

Channel—Channel Gain Match

±0.4

%FS

10 MHz Tested, Channel;

Crosstalk

90

dBc

20 MHz Other Channel

DC and Logic Electrical Characteristics

(1) (2) (3)

Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V, VDR =

+2.5V, PD = 0V, External VREF = +1.0V, fCLK = 80 MHz, fIN = 40 MHz, CL = 10 pF/pin, Duty Cycle Stabilizer On. Boldface

limits apply for TJ = TMIN to TMAX: all other limits TJ = 25°C

Units

Parameter

Test Conditions

Typical(4)

Limits(4)

(Limits)

DIGITAL INPUT CHARACTERISTICS

VIN(1)

Logical “1” Input Voltage

VD = 3.6V

2.0

V (min)

VIN(0)

Logical “0” Input Voltage

VD = 3.0V

1.0

V (max)

IIN(1)

Logical “1” Input Current

VIN = 3.3V

10

µA

IIN(0)

Logical “0” Input Current

VIN = 0V

−10

µA

CIN

Digital Input Capacitance

5

pF

DIGITAL OUTPUT CHARACTERISTICS

VDR = 2.5V

2.3

V (min)

VOUT(1)

Logical “1” Output Voltage

IOUT = −0.5 mA

VDR = 3V

2.7

V (min)

VOUT(0)

Logical “0” Output Voltage

IOUT = 1.6 mA, VDR = 3V

0.4

V (max)

VOUT = 2.5V or 3.3V

100

nA

IOZ

TRI-STATE Output Current

VOUT = 0V

−100

nA

+ISC

Output Short Circuit Source Current

VOUT = 0V

−20

mA

−ISC

Output Short Circuit Sink Current

VOUT = VDR

20

mA

COUT

Digital Output Capacitance

5

pF

(1)

The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided

current is limited per Note 4 of the Absolute Maximum Ratings Table. However, errors in the A/D conversion can occur if the input goes

above VA or below GND by more than 100 mV. As an example, if VA is +3.3V, the full-scale input voltage must be ≤+3.4V to ensure

accurate conversions. See Figure 2.

(2)

To ensure accuracy, it is required that |VA–VD| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.

(3)

With the test condition for VREF = +1.0V (2VP-P differential input), the 12-bit LSB is 488 µV.

(4)

Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are to AOQL (Average Outgoing Quality Level).

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