ADC12DL080

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SNAS345A – FEBRUARY 2006 – REVISED APRIL 2013

ADC12DL080 Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling

Check for Samples: ADC12DL080

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FEATURES

DESCRIPTION

The ADC12DL080 is a dual, low power monolithic

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•

Single +3.3V Supply Operation

CMOS

analog-to-digital

converter

capable

of

•

Internal Sample-and-Hold

converting analog input signals into 12-bit digital

•

Internal or External Reference

words at 80 Megasamples per second (MSPS). This

converter uses a differential, pipeline architecture with

•

Outputs 2.4V to 3.6V Compatible

digital error correction and an on-chip sample-and-

•

Power Down Mode

hold circuit to minimize power consumption while

•

Duty Cycle Stabilizer

providing excellent dynamic performance and a 600

MHz Full Power Bandwidth. Operating on a single

•

Pin Compatible with ADC12DL040,

+3.3V power supply, the ADC12DL080 achieves 11.0

ADC12DL065, ADC12DL066

effective bits at Nyquist and consumes just 447mW at

80 MSPS. The Power Down feature reduces power

APPLICATIONS

consumption to 50 mW.

•

Instrumentation

The differential inputs provide a full scale differential

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Communications Receivers

input swing equal to 2 times VREF with the possibility

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Sonar/Radar

of a single-ended input. Full use of the differential

input is recommended for optimum performance.

•

xDSL, Cable Modems

Duty cycle stabilization and output data format are

selectable. The output data can be set for offset

KEY SPECIFICATIONS

binary or two's complement.

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Resolution: 12 Bits

To ease interfacing to lower voltage systems, the

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Max Conversion Rate: 80 MSPS

digital output driver power pins of the ADC12DL080

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DNL: ±0.4 LSB (typ)

can be connected to a separate supply voltage in the

range of 2.4V to the analog supply voltage. This

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SNR (fIN=40MHz): 69 dB (typ)

device is available in the 64-lead TQFP package and

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SNR (fIN=200MHz): 67 dB(typ)

will operate over the industrial temperature range of

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SFDR (fIN=40MHz): 82 dB (typ)

−40°C to +85°C. An evaluation board is available to

ease the evaluation process.

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SFDR (fIN=200MHz): 81 dB (typ)

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Power Consumption

–

Operating: 447 mW (typ)

–

Power Down Mode: 50 mW (typ)

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PRODUCTION DATA information is current as of publication date.

Copyright © 2006–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.