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PCF85263ATL/A 数据表(PDF) 25 Page - NXP Semiconductors |
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PCF85263ATL/A 数据表(HTML) 25 Page - NXP Semiconductors |
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25 / 100 page  PCF85263A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4.1 — 27 November 2015 25 of 100 NXP Semiconductors PCF85263A Tiny RTC with alarm, battery switch-over, and I2C-bus 8.4.3 Alarm interrupts The generation of interrupts from the alarm functions is controlled via the alarm interrupt enable bits; A1IEA, A1IEB, A2IEA, A2IEB. These bits are in registers INTA_enable (address 29h) and INTB_enable (address 2Ah). (1) Only when all enabled alarm settings are matching. The flag is set only on increment to a matched case (and not all the time it is equal). Fig 13. Alarm1 and alarm2 function block diagram (stop-watch mode) |
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