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PCF85263ATL/A 数据表(PDF) 45 Page - NXP Semiconductors |
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PCF85263ATL/A 数据表(HTML) 45 Page - NXP Semiconductors |
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45 / 100 page  PCF85263A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4.1 — 27 November 2015 45 of 100 NXP Semiconductors PCF85263A Tiny RTC with alarm, battery switch-over, and I2C-bus 8.11.2 BSRR: battery switch internal refresh rate [1] Default value. Non-user bit. Recommended to leave set at default. 8.11.3 BSM[1:0]: battery switch mode [1] Default value. Switching is automatic and controlled by the voltages on the VBAT and VDD pins. There are three modes: • Compare VDD with an internal reference (Vth) • Compare VDD with VBAT • Compare VDD with an internal reference (Vth) and VBAT The last mode is useful when a rechargeable battery is employed. Due to the nature of the power switch circuit there is a switching hysteresis (see Figure 23 and Table 68). Table 39. BSRR bit - battery switch control (address 26h) bit description Bit Symbol Value Description 3 BSRR battery switch refresh rate 0[1] low 1high Table 40. BSM[1:0] bits - battery switch control (address 26h) bit description Bit Symbol Value Description 2 to 1 BSM[1:0] battery switch mode bits 00[1] switching at the Vth level 01 switching at the VBAT level 10 switching at the higher level of Vth or VBAT 11 switching at the lower level of Vth or VBAT Table 41. Battery switch-over modes BSM[1:0] Condition Internal power 00 VDD > Vth VDD VDD < Vth VBAT 01 VDD > VBAT VDD VDD < VBAT VBAT 10 VDD > the higher of Vth or VBAT VDD VDD < the higher of Vth or VBAT VBAT 11 VDD > the lower of Vth or VBAT VDD VDD < the lower of Vth or VBAT VBAT |
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