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PCF85263ATL/A 数据表(PDF) 60 Page - NXP Semiconductors |
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PCF85263ATL/A 数据表(HTML) 60 Page - NXP Semiconductors |
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60 / 100 page  PCF85263A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4.1 — 27 November 2015 60 of 100 NXP Semiconductors PCF85263A Tiny RTC with alarm, battery switch-over, and I2C-bus 8.15.2 CPR: clear prescaler To set the time for RTC mode accurately or to clear the time in stop-watch mode, the clear prescaler instruction is needed. Before sending this instruction, it is recommended to first set stop either by the STOP bit or by the TS pin (see STOPM bit). See STOP definition for an explanation on using this instruction. 8.15.3 CTS: clear timestamp The timestamp registers (address 11h to 22h) can be set to all 0 with this instruction. 8.16 Stop_enable register [1] Default value. The STOP bit stops the time from counting in both RTC mode and stop-watch mode. For RTC mode STOP is useful to set the time accurately. For stop-watch mode it is the start/stop control for the watch. The counter can also be controlled from the TS pin by configuring STOPM in the Function register (Section 8.13 on page 54). The internal stop signal is a combination of STOP and the TS pin state. [1] Requires STOPM and TSPM[1:0] to be configured. [2] TSL = 0 (active HIGH) (Pin_IO register, address 27h). 2Ch RAM_byte 00 00 00 00 2Dh WatchDog 0 00 00 00 0 2Fh Reset 00 00 00 00 Table 62. Registers reset values …continued Registers labeled as - remain unchanged. Address Register name Bit 7 6 5 4 3 2 1 0 Table 63. Stop_enable - control of STOP bit (address 2Eh) Bit Symbol Value Description 7 to 1 0 - 0000000 not used STOP STOP bit 0[1] RTC clock runs 1 RTC clock is stopped Table 64. Counter stop signal STOP bit TS pin[1][2] stop signal Counter 1 - 1 stopped - 1 1 stopped 0 0 0 running |
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