PCF85263ATLSLASHA datasheet(6/100 Pages) NXP

6 / 100 page

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7.2 Pin description

[1]

Connect to VDD if not used.

[2]

See Table 7 and Table 47.

[3]

The die paddle (exposed pad) is connected to VSS through high ohmic (non-conductive) silicon attach and should be electrically isolated. It is good engineering practice to solder

the exposed pad to an electrically isolated PCB copper pad as shown in Figure 45 “Package outline SOT1197-1 (DFN2626-10), PCF85263ATL” for better heat transfer but it is not

required as the RTC doesn’t consume much power. In no case should traces be run under the package exposed pad.

[4]

See Table 7 and Table 49.

Table 4.

Pin description

Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.

Symbol

Type

Description

PCF85263AT

(SO8)

PCF85263ATL

(DFN2626-10)

PCF85263ATT

(TSSOP8)

PCF85263ATT1

(TSSOP10)

Primary use

Secondary use

OSCI

input

oscillator input

OSCO

output

oscillator output

VBAT

supply

battery backup supply

voltage[1]

TS (CLK/INTB)

4input/

output

can be configured with TSPM[1:0][2]

timestamp input

INTB and CLK output

(push-pull); stop-watch

control

VSS

5[3]

supply

ground supply voltage

SDA

5656input/

output

serial data line

SCL

input

serial clock input

CLK

output

CLK (push-pull)

INTA (CLK)

output

can be configured with INTAPM[1:0][4]

interrupt output

(open-drain)

CLK output (open-drain)

VDD

supply

supply voltage

PCF85263ATL/A 数据表(PDF) 6 Page - NXP Semiconductors

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