STM32MP151AAB3T datasheet(125/245 Pages) STMICROELECTRONICS

125 / 245 page

DS12500 Rev 1

125/245

STM32MP151A

Electrical characteristics

228

VBAT

Backup operating

voltage

64 KB retention SRAM not used

1.2

3.6

64 KB retention SRAM used

1.4

VDD3V3_USBFS(8)

USB FS I/O supply

voltage

USB OTG FS used

3.3

3.6

USB OTG FS not used

3.6

VDD3V3_USBHS(8)

(9)

USB HS I/O supply

voltage

USBH or USB OTG HS used

3.3

3.6

USBH and USB OTG HS not

used

3.6

VDD3V3_USB(8)

USB I/O supply

voltage

USB used

3.3

3.6

USB not used

3.6

VDDQ_DDR(10)

DDR PHY supply

voltage

DDR3 memory

1.425

1.5

1.575

DDR3L memory

1.283

1.35

1.45

LPDDR2 or LPDDR3

1.14

1.2

1.3

VDDA1V8_REG

USB HS PHY voltage

supply with 1.8 V

regulator in bypass

mode

BYPASS_REG1V8 = VDD

1.65

1.8

1.95

VIN

I/O Input voltage

TTxa I/O

-0.3

VDD+0.3

VBUS I/O

-0.3

DDR I/O

-0.3

VDDQ_DDR

USB HS I/O

-1

5.25

All I/O except TTxa

-0.3

See(11)

Junction temperature

range

Suffix 3 version

-40

125

1. Once nRST is released functionality is guaranteed down to VBOR falling edge max.

2. Min VDD is 2.25 V when REG1V8 is used BYPASS_REG1V8 = 0.

3. Should be connected to same power supply voltage as VDD.

4. It is recommended to connect VDD_PLL and VDD_PLL2 to same power supply as VDD.

5. 1.25 V is the max allowed voltage, however LPLV-Stop mode is only relevant for VDDCORE up to 0.95 V. In LPLV-Stop

mode, if VDDQ_DDR is not shutdown, to avoid overconsumption on VDDQ_DDR, the DDR memory must be put in

SelfRefresh and DDR PHY must be set in retention mode (setting bit DDRRETEN: DDR retention enable of PWR control

6. DAC cannot be used with VREF below 1.8 V.

7. ADC cannot be used with VREF below 2 V and VDDA above 2 V.

8. Depending on package selected, either VDD3V3_USBFS and VDD3V3_USBHS or only VDD3V3_USB are available.

9. For operation with voltage higher than Min (VDD, VDDA, VDD3V3_USBFS) +0.3 V, the internal Pull-up and Pull-Down resistors

must be disabled.

10. Independent from any other supply.

11. Min(VDD, VDDA, VDD3V3_USBFS) +3.6 V < 5.5 V. This formula has to be applied on power supplies related to the IO structure

described by the pin definition table.

Table 13. General operating conditions (continued)

Symbol

Parameter

Operating conditions

Min.

Typ

Max.

Unit

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