PCF8545ATTSLASHA datasheet(37/72 Pages) NXP

37 / 72 page

PCF8545

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Product data sheet

Rev. 1 — 13 November 2013

37 of 72

NXP Semiconductors

PCF8545

Universal LCD driver for multiplex rates up to 1:8

9.2 I2C-bus interface

The I2C-bus is for bidirectional, two-line communication between different ICs or modules.

The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must

be connected to a positive supply via a pull-up resistor when connected to the output

stages of a device. Data transfer may be initiated only when the bus is not busy.

9.2.1 Bit transfer

One data bit is transferred during each clock pulse. The data on the SDA line must remain

stable during the HIGH period of the clock pulse as changes in the data line at this time is

interpreted as a control signal (see Figure 26).

9.2.2 START and STOP conditions

Both data and clock lines remain HIGH when the bus is not busy.

A HIGH-to-LOW change of the data line, while the clock is HIGH, is defined as the START

condition (S).

A LOW-to-HIGH change of the data line, while the clock is HIGH, is defined as the STOP

condition (P).

The START and STOP conditions are shown in Figure 27.

9.2.3 System configuration

A device generating a message is a transmitter, a device receiving a message is the

receiver. The device that controls the message is the master and the devices which are

controlled by the master are the slaves. The system configuration is shown in Figure 28.

Fig 26. Bit transfer

Fig 27. Definition of START and STOP conditions

PCF8545ATT/A 数据表(PDF) 37 Page - NXP Semiconductors