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L9301 数据表(PDF) 15 Page - STMicroelectronics |
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L9301 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 54 page ![]() DS11400 Rev 9 15/54 L9301 Configuration 53 6 Configuration The selected configuration can be configured by SPI, there are 2 bits dedicated to configuration selection: The configuration is enabled only when EN pin is logic 0. In configuration 4, the output DRN/SRC1-4 can be controlled by SPI only; for those outputs the selection between high side and low side configuration can be done through the dedicated bit (bit8 of Device general configuration register). Table 13. Configuration Bit1 Bit0 Configuration Input → Output Description 0 0 1 IN1-4 → DRN1-4, OUT1-4 (paralleled) IN5-8 → OUT5-8 8 low side channels with Rdson = 0.3 Ω 0 1 2 IN1-4 → OUT1-4 IN5-8 → OUT5-8 4 low side channels with Rdson = 0.6 Ω 4 low side channels with Rdson = 0.3 Ω 1 0 3 IN1-4 → SRC1-4, IN5-8 → OUT5-8 4 high side channels with Rdson = 0.6 Ω 4 low side channels with Rdson = 0.3 Ω 1 1 4 IN1-4 → OUT1-4, IN5-8 → OUT5-8, SPI → DRN/SRC1-4 4 low side channels with Rdson = 0.6 Ω 4 low side channels with Rdson = 0.3 Ω 4 low/high side ch. with Rdson = 0.6 Ω |
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